7.1 Device Behavior During Internal Write Cycle

To ensure that the address and data sent to the device for writing are not corrupted while any type of internal write operation is in progress, commands sent to the device are blocked from being recognized until the internal operation is completed. If a write interruption occurs (SI/O pulsed low) and is small enough to not deplete the internal power storage, the device will NACK signaling that the operation is in progress. If an interruption is longer than t_DSCHG, the internal write operation will be terminated and may result in data corruption.