8.4.1 Serial Number Read
The lower eight bytes of the Security register contain a
factory-programmed, unique, 64‑bit serial number. To ensure a unique value, the entire
64-bit serial number must be read starting at Security register address location 00h.
Therefore, it is recommended that a sequential read started with a random read operation be
used, ensuring that the random read sequence uses a device address byte with opcode
1011b (Bh) specified in addition to the memory address byte being set
to 00h.
The first byte read out of the 64-bit serial number is the product identifier (A0h). Following the product identifier, a 48-bit unique number is contained in bytes 1 through 6. The last byte of the serial number contains a cyclic redundancy check (CRC) of the other 56 bits. The CRC is generated using the CRC-8/Maxim algorithm from the public domain. The structure of the 64-bit serial number is depicted in Table 8-1.
| Byte 0 | Byte 1 | Byte 2 | Byte 3 | Byte 4 | Byte 5 | Byte 6 | Byte 7 |
|---|---|---|---|---|---|---|---|
| 8-bit Product Identifier (A0h) | 48-bit Unique Number | 8-bit CRC Value | |||||
Once all eight bytes of the serial number have been read, the host can
return a NACK (logic ‘1’) response to end the read operation and return
the device to Standby mode. If the host sends an ACK (logic ‘0’) instead
of a NACK, then the next byte (address location 08h) in the Security register will be
output. If the end of the Security register is reached, then the Address Pointer will “roll
over” to the beginning (address location 00h) of the Security register.