16.13.7 Memory BIST Fault Injection 1
Note:
- MBFI1, BCC[1] and DCC[1] are aliases that use the same internal 32-bit register.
- This register is write-protected when CFG.MBFI=0.
- This register is not asynchronously reset, therefore it must be properly initialized before any MBIST operation.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | MBFI1 |
| Offset: | 0x0018 |
| Reset: | 0x00000000 |
| Property: | PAC Write Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| ADDR[29:22] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| ADDR[21:14] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ADDR[13:6] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADDR[5:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | x | x | x | x | x | x | |||
Bits 31:2 – ADDR[29:0] Word Address
A fault is injected during the AHB data phase when CFG.MBFI = 1, MBIST is operating, and one of these conditions is true:
- MBFI0.AMMOD = 1 (ALWAYS),
or
- ((DSU AHB Host byte address[31:2]) & ~{6'h00,MBFI0.AMMSK} == MBFI1.ADDR & ~{6'h00,MBFI0.AMMSK}).