38.7.17 Interrupt Line Select

The Interrupt Line Select register assigns an interrupt generated by a specific interrupt flag from IR to one of the two module interrupt lines.

Bit 29 – ARAL Access to Reserved Address Interrupt Line

Bit 28 – PEDL Protocol Error in Data Phase Interrupt Line

Bit 27 – PEAL Protocol Error in Arbitration Phase Interrupt Line

Bit 26 – WDIL Watchdog Interrupt Line

Bit 25 – BOL 'bus off' Status Interrupt Line

Bit 24 – EWL Error Warning Status Interrupt Line

Bit 23 – EPL Error Passive Interrupt Line

Bit 22 – ELOL Error Logging Overflow Interrupt Line

Bit 19 – DRXL Message stored to Dedicated Rx Buffer Interrupt Line

Bit 18 – TOOL Timeout Occurred Interrupt Line

Bit 17 – MRAFL Message RAM Access Failure Interrupt Line

Bit 16 – TSWL Timestamp Wraparound Interrupt Line

Bit 15 – TEFLL Tx Event FIFO Event Lost Interrupt Line

Bit 14 – TEFFL Tx Event FIFO Full Interrupt Line

Bit 13 – TEFWL Tx Event FIFO Watermark Reached Interrupt Line

Bit 12 – TEFNL Tx Event FIFO New Entry Interrupt Line

Bit 11 – TFEL Tx FIFO Empty Interrupt Line

Bit 10 – TCFL Transmission Cancellation Finished Interrupt Line

Bit 9 – TCL Transmission Completed Interrupt Line

Bit 8 – HPML High Priority Message Interrupt Line

Bit 7 – RF1LL Rx FIFO 1 Message Lost Interrupt Line

Bit 6 – RF1FL Rx FIFO 1 Full Interrupt Line

Bit 5 – RF1WL Rx FIFO 1 Watermark Reached Interrupt Line

Bit 4 – RF1NL Rx FIFO 1 New Message Interrupt Line

Bit 3 – RF0LL Rx FIFO 0 Message Lost Interrupt Line

Bit 2 – RF0FL Rx FIFO 0 Full Interrupt Line

Bit 1 – RF0WL Rx FIFO 0 Watermark Reached Interrupt Line

Bit 0 – RF0NL Rx FIFO 0 New Message Interrupt Line

PIC32CZ CA80/CA90 Family

38.7.17 Interrupt Line Select

Bit 29 – ARAL Access to Reserved Address Interrupt Line

Bit 28 – PEDL Protocol Error in Data Phase Interrupt Line

Bit 27 – PEAL Protocol Error in Arbitration Phase Interrupt Line

Bit 26 – WDIL Watchdog Interrupt Line

Bit 25 – BOL 'bus off' Status Interrupt Line

Bit 24 – EWL Error Warning Status Interrupt Line

Bit 23 – EPL Error Passive Interrupt Line

Bit 22 – ELOL Error Logging Overflow Interrupt Line

Bit 19 – DRXL Message stored to Dedicated Rx Buffer Interrupt Line

Bit 18 – TOOL Timeout Occurred Interrupt Line

Bit 17 – MRAFL Message RAM Access Failure Interrupt Line

Bit 16 – TSWL Timestamp Wraparound Interrupt Line

Bit 15 – TEFLL Tx Event FIFO Event Lost Interrupt Line

Bit 14 – TEFFL Tx Event FIFO Full Interrupt Line

Bit 13 – TEFWL Tx Event FIFO Watermark Reached Interrupt Line

Bit 12 – TEFNL Tx Event FIFO New Entry Interrupt Line

Bit 11 – TFEL Tx FIFO Empty Interrupt Line

Bit 10 – TCFL Transmission Cancellation Finished Interrupt Line

Bit 9 – TCL Transmission Completed Interrupt Line

Bit 8 – HPML High Priority Message Interrupt Line

Bit 7 – RF1LL Rx FIFO 1 Message Lost Interrupt Line

Bit 6 – RF1FL Rx FIFO 1 Full Interrupt Line

Bit 5 – RF1WL Rx FIFO 1 Watermark Reached Interrupt Line

Bit 4 – RF1NL Rx FIFO 1 New Message Interrupt Line

Bit 3 – RF0LL Rx FIFO 0 Message Lost Interrupt Line

Bit 2 – RF0FL Rx FIFO 0 Full Interrupt Line

Bit 1 – RF0WL Rx FIFO 0 Watermark Reached Interrupt Line

Bit 0 – RF0NL Rx FIFO 0 New Message Interrupt Line