2.4.2 Maximum Power Dissipation Formula Calculations and Requirements
- Package Maximum Power Dissipation
in Watts (PDmax):
PDmax = (TJ – TA) / θJA package.
This calculates maximum power dissipation based on the difference between the junction’s temperature TJ and the ambient temperature TA, divided by thermal resistance from the junction to ambient θJA for the package.
It's crucial to ensure that the actual power dissipation in the device does not exceed PDmax to prevent overheating while ensuring reliable operation.
- Internal Power Dissipation in a
Microcontroller (PINTERNAL):
PINTERNAL = PI/O + Pperipheral + Pcore
The formula calculates PINTERNAL based on encompassing the power dissipation in the I/O circuitry PI/O, the power dissipation in the VDDx power supplies, and the power dissipation in the 1.8V power supply for the core and CPU.
Terms:
- PI/O: Power dissipation in the I/O (Input/Output)
- Pperipheral: Peripheral Power
- Pperipheral = VDDx * (Total VDDX_IDD)
- VDDx: Supply voltage (3.3V)
- Total VDDX_IDD: Sum of all active peripheral currents associated with the VDDX power domain (refer to the Calculation Form)
- Pcore=
Power dissipation associated with core and CPU
- Pcore = 1.8v * Internal regulator current (SUM Total)
- Internal regulator current = Total VREGSWn (Core_IDD) + CPU_IDDREG
- Total VREGSWn (Core_IDD): Sum of all active peripheral currents associated with the core power domain (refer to the Calculation Form)
- 1.8v is the supply voltage for the core and CPU
- CPU_IDDREG = Sum of current in SRAM + PLL + USB
- Power dissipation in the I/O
circuitry of a microcontroller (PI/O):
PI/O = Σ (({VDDIOx – VOH} x IOH) + Σ (VOL x IOL)) + (3.3V * VUSB3V3_0 IDD) + (3.3V * VUSB3V3_1 IDD)
Terms:
- VOH: High-level output voltage (voltage level when the output is in a high state)
- IOH: High-level output current
- VOL: Low-level output voltage (voltage level when the output is in a low state)
- IOL: Low-level output current
The formula calculates the power dissipation in the I/O circuitry by summing up the contributions from both high-level and low-level output currents for each I/O pin and adds the power dissipation associated with the power supply currents for the USBs.
Safe Power Operating Condition Requirements
To achieve the application within the safe power conditions, the following requirements must be met:
- PINTERNAL ≤ PDmax.
- Total VREG_SWn (CORE IDD) ≤ 341 mA, (Refer to the MCU Active Power, Parameter APWR_9).
The following figure shows the internal regulator block diagram, which provides the tentative values for all active peripheral currents and power supply current values.
- The sum of CPU + SRAM + PLL maximum currents.