25.6 DMA Event/Trigger Mapping
Instance | Channel | CHCTRLBk.TRIG [index] | Comment | |
---|---|---|---|---|
DSU | DCCx | 2..3 | DMAC ID for DCC, x=0,1 | |
RTC | TIMESTAMP | 4 | RTC Timestamp trigger | |
SERCOM0 | RX | 5 | DMA RX trigger | |
TX | 6 | DMA TX trigger | ||
SERCOM1 | RX | 7 | DMA RX trigger | |
TX | 8 | DMA TX trigger | ||
SERCOM2 | RX | 9 | DMA RX trigger | |
TX | 10 | DMA TX trigger | ||
SERCOM3 | RX | 11 | DMA RX trigger | |
TX | 12 | DMA TX trigger | ||
SERCOM4 | RX | 13 | DMA RX trigger | |
TX | 14 | DMA TX trigger | ||
SERCOM5 | RX | 15 | DMA RX trigger | |
TX | 16 | DMA TX trigger | ||
SERCOM6 | RX | 17 | DMA RX trigger | |
TX | 18 | DMA TX trigger | ||
SERCOM7 | RX | 19 | DMA RX trigger | |
TX | 20 | DMA TX trigger | ||
TCC0 | OVF | 25 | DMA overflow/underflow/retrigger trigger | |
MCx | 26-33 | DMA Match/Compare triggers, x=0,1,...,7 | ||
TCC1 | OVF | 34 | DMA overflow/underflow/retrigger trigger | |
MCx | 35..42 | DMA Match/Compare triggers, x=0,1,...,7 | ||
TCC2 | OVF | 43 | DMA overflow/underflow/retrigger trigger | |
MCx | 44..49 | DMA Match/Compare triggers, x=0,1,…,5 | ||
TCC3 | OVF | 50 | DMA overflow/underflow/retrigger trigger | |
MCx | 51..52 | DMA Match/Compare triggers, x=0,1 | ||
TCC4 | OVF | 53 | DMA overflow/underflow/retrigger trigger | |
MCx | 54..55 | DMA Match/Compare triggers, x=0,1 | ||
TCC5 | OVF | 56 | DMA overflow/underflow/retrigger trigger | |
MCx | 57..58 | DMA Match/Compare triggers, x=0,1 | ||
TCC6 | OVF | 59 | DMA overflow/underflow/retrigger trigger | |
MCx | 60..61 | DMA Match/Compare triggers, x=0,1 | ||
TCC7 | OVF | 62 | DMA overflow/underflow/retrigger trigger | |
MCx | 63..64 | DMA Match/Compare triggers, x=0,1 | ||
ADC | PFFRDY | 75 | ADC DMA PFFRDY trigger | |
PTC | SEQ | 76 | PTC Ready Trigger | |
WCOMP | 77 | - | ||
EOC | 78 | - | ||
SPI_IXS0 | DREQ_RX | 79 | Indexes of DMA RX triggers | |
SPI_IXS0 | DREQ_TX | 80 | Indexes of DMA TX triggers | |
SPI_IXS1 | DREQ_RX | 81 | Indexes of DMA RX triggers | |
SPI_IXS1 | DREQ_TX | 82 | Indexes of DMA TX triggers | |
CAN0 | DEBUG | 83 | DMA CAN Debug Req | |
CAN1 | DEBUG | 84 | DMA CAN Debug Req | |
Reserved | DEBUG | 89 | - | |
Reserved | DEBUG | 90 | - | |
Note:
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