25.9 Register Summary
For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | CTRLA | 31:24 | ||||||||
| 23:16 | ||||||||||
| 15:8 | ||||||||||
| 7:0 | ENABLE | |||||||||
| 0x04 | CTRLB | 31:24 | Bit 0-1, 8-9, 17-16, 24-25: QOSn, Priority Group n [n=1,..,4] QOS control | |||||||
| 23:16 | Bit 0-1, 8-9, 17-16, 24-25: QOSn, Priority Group n [n=1,..,4] QOS control | |||||||||
| 15:8 | Bit 0-1, 8-9, 17-16, 24-25: QOSn, Priority Group n [n=1,..,4] QOS control | |||||||||
| 7:0 | Bit 0-1, 8-9, 17-16, 24-25: QOSn, Priority Group n [n=1,..,4] QOS control | |||||||||
| 0x08 | DBGCTRL | 31:24 | ||||||||
| 23:16 | ||||||||||
| 15:8 | ||||||||||
| 7:0 | DBGRUN | |||||||||
| 0x0C | CRCPOLYA | 31:24 | POLYA[31:24] | |||||||
| 23:16 | POLYA[23:16] | |||||||||
| 15:8 | POLYA[15:8] | |||||||||
| 7:0 | POLYA[7:0] | |||||||||
| 0x10 | CRCPOLYB | 31:24 | POLYB[31:24] | |||||||
| 23:16 | POLYB[23:16] | |||||||||
| 15:8 | POLYB[15:8] | |||||||||
| 7:0 | POLYB[7:0] | |||||||||
0x14 ... 0x17 | Reserved | |||||||||
| 0x18 | INTSTAT3 | 31:24 | ||||||||
| 23:16 | ||||||||||
| 15:8 | CH15 | CH14 | CH13 | CH12 | CH11 | CH10 | CH9 | CH8 | ||
| 7:0 | CH7 | CH6 | CH5 | CH4 | CH3 | CH2 | CH1 | CH0 | ||
| 0x1C | INTSTAT2 | 31:24 | ||||||||
| 23:16 | ||||||||||
| 15:8 | CH15 | CH14 | CH13 | CH12 | CH11 | CH10 | CH9 | CH8 | ||
| 7:0 | CH7 | CH6 | CH5 | CH4 | CH3 | CH2 | CH1 | CH0 | ||
| 0x20 | INTSTAT1 | 31:24 | ||||||||
| 23:16 | ||||||||||
| 15:8 | CH15 | CH14 | CH13 | CH12 | CH11 | CH10 | CH9 | CH8 | ||
| 7:0 | CH7 | CH6 | CH5 | CH4 | CH3 | CH2 | CH1 | CH0 | ||