41.3.3 Power-Down Current (IPD)(1,2,3)

Table 41-3. 
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Device Characteristics Min. Typ.† Max. +85°C Max. +125°C Units Conditions
VDD Note
D200 IPD IPD Base 0.4 2.5 12 μA 3.0V
D201 IPD_WDT Low-Frequency Internal Oscillator/WDT 0.5 5 13 μA 3.0V
D203 IPD_LPBOR Low-Power Brown-out Reset (LPBOR) 0.6 5 13 μA 3.0V
D204 IPD_FVR_BUF1 FVR Buffer 1 (ADC) 36 64 76 μA 3.0V
D204A IPD_FVR_BUF2 FVR Buffer 2 (DAC/CMP) 36 64 76 μA 3.0V
D205 IPD_BOR Brown-out Reset (BOR) 27 60 70 μA 3.0V
D207 IPD_ADCA ADC - Active 5 13 μA 3.0V ADC is not converting (Note 4)
D208 IPD_CMP1 Comparator1 17 43 59 μA 3.0V C1SP = 1, Low Power/Speed; CPON = 00
D208A IPD_CMP1 Comparator1 61 μA 3.0V C1SP = 0, High Power/Speed; CPON = 00
D208B IPD_CMP2 Comparator2 17 43 59 μA 3.0V C2SP = 1, Low Speed/Power; CPON = 00
D208C IPD_CMP2 Comparator2 61 μA 3.0V C2SP = 0, High Speed/Power; CPON = 00
D209 IPD_CP Charge Pump 80 μA 3.0V CPON = 11

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max. values will be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High-Impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is ADCRC.