29 CLB - Configurable Logic Block

The Configurable Logic Block (CLB) is a collection of logic elements that can be programmed to perform a wide variety of digital logic functions. The logic function may be completely combinatorial, sequential, or a combination of the two, enabling users to incorporate hardware-based custom logic into their applications.

The CLB module consists of two sets of register interfaces: the standard Special Function Register (SFR) interface, and a Configuration Interface.

These SFRs allow user software the ability to enable the module, program input bits into the CLB memory, select a clock source, and enable PPS outputs for specific BLE outputs.

The Configuration Interface allows for complete configuration of the CLB module. The Interface does not appear as an SFR in the Register Map and is not directly user-accessible; it is accessible only through a programming system such as Microchip MPLAB® Integrated Development Environment (IDE) that supports programming the CLB. Configuration data for the CLB is then written to Program Memory through the NVM Scanner Module.