16.9.2 Event Control - MODE2
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | EVCTRL |
| Offset: | 0x04 |
| Reset: | 0x0000 |
| Property: | Enable-Protected, Write-Protected |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| OVFEO | ALARMEO0 | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PEREOx | PEREOx | PEREOx | PEREOx | PEREOx | PEREOx | PEREOx | PEREOx | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – OVFEO Overflow Event Output Enable
| Value | Description |
|---|---|
| 0 | Overflow event is disabled and will not be generated |
| 1 | Overflow event is enabled and will be generated for every overflow |
Bit 8 – ALARMEO0 Alarm 0 Event Output Enable
| Value | Description |
|---|---|
| 0 | Alarm 0 event is disabled and will not be generated |
| 1 | Alarm 0 event is enabled and will be generated for every alarm |
Bits 7,6,5,4,3,2,1,0 – PEREOx Periodic Interval x Event Output Enable [x=7:0]
| Value | Description |
|---|---|
| 0 | Periodic Interval x event is disabled and will not be generated |
| 1 | Periodic Interval x event is enabled and will be generated |