29.7.8 Data DAC

Table 29-9. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	DATA
Offset:	0x08
Reset:	0x0000
Property:	PAC Write-Protection


Bit	15	14	13	12	11	10	9	8
	DATA[15:8]
Access	W	W	W	W	W	W	W	W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	DATA[7:0]
Access	W	W	W	W	W	W	W	W
Reset	0	0	0	0	0	0	0	0

Bits 15:0 – DATA[15:0] Data value to be converted

DATA register contains the 10-bit value that is converted to a voltage by the DAC. The adjustment of these 10 bits within the 16-bit register is controlled by CTRLB.LEFTADJ.

Table 29-10. Valid Data Bits
CTRLB.LEFTADJ	DATA	Description
0	DATA[9:0]	Right adjusted, 10-bits
1	DATA[15:6]	Left adjusted, 10-bits