11.3.1.6 Enable Write Synchronization

Writing to the Enable bit in the Control register (CTRL.ENABLE) will also trigger write synchronization and set STATUS.SYNCBUSY. CTRL.ENABLE will read its new value immediately after being written. The Synchronisation Ready interrupt (if available) cannot be used for Enable write synchronization.

When the enable write synchronization is ongoing (STATUS.SYNCBUSY is one), attempt to do any of the following will cause the peripheral bus to stall until the enable synchronization is complete:

• Writing a Peripheral Core register
• Writing an APB register
• Reading a Read-synchronized Peripheral Core register

APB registers can be read while the enable write synchronization is ongoing without causing the peripheral bus to stall.