4.1 Revision HistoryDoc. Rev.DateCommentsB05/2024 Document:Editorial updates Added new errata:Device: IDD Power-Down Current ConsumptionWriting the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration ValuesWrite Operation Lost if Consecutive Writes to Specific Address SpacesADC: ADC Stays Active in Sleep Modes for Low Latency Mode and Free Running ModeCRCSCAN: Running CRC Scan on Part of The Flash is Non-FunctionalNVMCTRL: Wrong Reset Value of NVMCTRL.CTRLA RegisterTCA: Restart Will Reset Counter Direction in NORMAL and FRQ ModeUSART: Receiver Non-Functional after Detection of Inconsistent Synchronization Field Added new data sheet clarifications:I/O Multiplexing and Considerations:I/O Multiplexing Electrical Characteristics:I/O Pin CharacteristicsSPI - Timing CharacteristicsProgramming Time A09/2021Initial document release