4.1 Revision History


Doc. Rev.	Date	Comments
B	05/2024	Document: Editorial updates Added new errata: Device: 2.2.1 IDD Power-Down Current Consumption 2.2.2 Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘`1`’ Prevents Automatic Loading of Calibration Values 2.2.3 Write Operation Lost if Consecutive Writes to Specific Address Spaces ADC: 2.3.3 ADC Stays Active in Sleep Modes for Low Latency Mode and Free Running Mode CRCSCAN: 2.5.1 Running CRC Scan on Part of The Flash is Non-Functional NVMCTRL: 2.6.1 Wrong Reset Value of NVMCTRL.CTRLA Register TCA: 2.7.1 Restart Will Reset Counter Direction in NORMAL and FRQ Mode USART: 2.9.2 Receiver Non-Functional after Detection of Inconsistent Synchronization Field Added new data sheet clarifications: I/O Multiplexing and Considerations: 3.1.1 I/O Multiplexing Electrical Characteristics: 3.2.1 I/O Pin Characteristics 3.2.2 SPI - Timing Characteristics 3.2.3 Programming Time
A	09/2021	Initial document release