47.4.2 Internal Oscillator Parameters(1)

Table 47-8. 
Standard Operating Conditions (unless otherwise stated)
Param No. Sym. Characteristic Min. Typ. † Max. Units Conditions
OS50 FHFOSC Precision Calibrated HFINTOSC Frequency —

4

8

12

16

32

48

64

 — MHz (Note 2)
OS51 FHFOSCLP Low-Power Optimized HFINTOSC Frequency

0.92

1.84

0.88

1.76

1

2

1

2

1.08

2.16

1.12

2.24

MHz

MHz

MHz

MHz

-40°C ≤ TA ≤ 85°C

-40°C ≤ TA ≤ 85°C

85°C ≤ TA ≤ 125°C

85°C ≤ TA ≤ 125°C
OS52 FMFOSC Internal Calibrated MFINTOSC Frequency — 500 — kHz
OS53 FLFOSC Internal LFINTOSC Frequency 24.8 31 37.2 kHz
OS54 THFOSCST HFINTOSC Wake-up from Sleep Start-up Time

—

13

20

μs

VREGPM = 00

System Clock at 4 MHz

VDD = 3.0V

—

30

48

μs

VREGPM = 01

System Clock at 4 MHz

VDD = 3.0V

—

115

210

μs

VREGPM = 10

System Clock at 4 MHz

VDD = 3.0V

—

120

220

μs

VREGPM = 11

System Clock at 4 MHz

VDD = 3.0V
OS56 TLFOSCST LFINTOSC Wake-up from Sleep Start-up Time — 292 420 μs

25ºC ≤ TA ≤ 125ºC

VDD = 3.0V

VREGPM = xx

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and 0.01 μF values in parallel are recommended.
  2. See the figure below.
Figure 47-5. Precision Calibrated HFINTOSC Frequency Accuracy Over Device VDD and Temperature