4 Simulation

RTL simulation mode is available for all of the transceiver modes. This simulation mode enables the simulation of all the protocol communication layers (including the PMA, PCS, and fabric interfaces) and provides cycle-accurate simulation for the design. In RTL simulation mode, the recovered clock frequency is derived from the reference clock and not from the incoming data. Also, using RTL simulation incurs some run-time penalties. Microchip provides a specific PCIe BFM model for enhanced simulation of PCIe designs using the embedded PCIe controllers, see PolarFire Family PCI Express User Guide.

Figure 4-1. RTL Simulation Block Diagram