2.3 ICSP Mode Exit
To exit ICSP mode and begin internal code execution, drive MCLR low, tri-state PGECx and PGEDx, maintain MCLR low for 1 ms, then raise MCLR (preferably, tri-state MCLR instead and let an on-board pull-up to VDD decide if user code execution is wanted at this point or not).
Exiting ICSP mode causes a pseudo-POR event internally. Therefore, all SFRs written during the ICSP session will be cleared back to their Reset default states, generally including the SFRs specifically documented as being reset only on POR or BOR-type Resets. RAM state generated during the ICSP session will be retained until the target is power cycled, overwritten by RAM BIST hardware or overwritten by application code execution.
