38.3.3 Power-Down Current (IPD)(1,2)

Table 38-3. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDVREGPMNote

D200A

IPDIPD Base—0.64.013μA3.0Vb'10'
D200B—45——μA3.0Vb'01'
D200C—170——μA3.0Vb'00'
D201IPD_WDTLow-Frequency Internal Oscillator/WDT—0.95.014μA3.0Vb'10'
D202IPD_SOSCSecondary Oscillator (SOSC)—1.1——μA3.0Vb'10'
D203IPD_LPBORLow-Power Brown-out Reset (LPBOR)—0.96.0—μA3.0Vb'10'
D204IPD_FVRFVR—63125135μA3.0Vb'10'FVRCON = 0x81 or 0x84
D205IPD_BORBrown-out Reset (BOR)—306063μA3.0Vb'10'
D206IPD_HLVDHigh/Low Voltage Detect (HLVD)—22——μA3.0Vb'10'
D207IPD_ADCAADC - Active—330——μA3.0Vb'10'ADC is converting (4)
D208IPD_CMPComparator—487580μA3.0Vb'10'Only one comparator active

Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values should be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.