20.9.5 TxCLKCON
| Name: | TxCLKCON |
| Address: | 0xFBE,0xFB8,0xFB2 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CS[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 3:0 – CS[3:0] Timer Clock Source Selection bits
| Value | Description |
|---|---|
| n | See Clock Source Selection table |
| Name: | TxCLKCON |
| Address: | 0xFBE,0xFB8,0xFB2 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CS[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Value | Description |
|---|---|
| n | See Clock Source Selection table |
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.