1.2 ROM Code Boot Sequence

The boot sequence is an ordered list of NVM interfaces stored in the boot configuration packet. This list is used by the ROM code to look for specific code patterns and launch the second-stage bootloader.

Out of the factory, all Microchip 32-bit MPU devices come with a default boot sequence. This default boot sequence can be modified by writing a new BCP into the real OTP memory matrix or into the emulated one (which is mapped over the internal SRAM1 area).

The ROM code uses the default boot sequence only if there is no valid BCP in the OTP memory matrix, real or emulated.

The default boot sequence for SAM9X60 MPU devices is as follows:

  1. SDMMC0 IOSET1
  2. SDMMC1 IOSET1
  3. QSPI0 IOSET1
  4. SPI0 IOSET1
  5. NAND0 IOSET1
Note: For other Microchip 32-bit MPU devices, the default boot sequence is different. Refer to the relevant device data sheet for details.