1 ROM Code Boot Strategies (First-Stage Bootloader)

This chapter provides a quick overview of how to configure the first-stage bootloader for devices that use a Boot Configuration Packet (BCP), as well as the special format required by a second-stage bootloader to be considered valid (“bootable”) by the ROM code.

For devices using a Boot Configuration Word, this chapter is not directly applicable, but the steps provided can be easily adapted.

For all Microchip 32-bit MPU devices, the ROM code serves as the first-stage bootloader. The ROM code is an essential firmware component embedded in the MPU’s internal Read-Only Memory (ROM). Upon power-on or reset, it initializes critical system components such as the processor clock and the system clock, completes integrity checks on the internal One-Time Programmable (OTP) memory matrix, and then begins to initialize external NVM interfaces one by one in the order listed in the BCP.

The ROM code reads the first 28 bytes, starting at offset zero, for every external NVM interface listed in the boot sequence and checks for a valid code pattern. If the code matches the expected pattern, it loads the second-stage bootloader from the external NVM into the first half of the internal SRAM0, mirrors the entire internal SRAM0 to address 0x00000000, and executes a jump to address 0x00000000, giving control to the second-stage bootloader.

If the code does not match the expected pattern in any of the external NVM interfaces listed in the BCP, the ROM code switches to the standard monitor, listening for monitor commands from the host.