23.5.17 Capture x
For capture operation, these registers constitute the second buffer level and access point for the CPU. The TCDn.CAPTUREx registers are updated with the buffer value when an UPDATE condition occurs. CAPTURE A register contains the value from the TCD counter when a Trigger A or a software capture A occurs. CAPTURE B register contains the value from the TCD counter when Trigger B or software capture B occurs.
The TCD counter value is synchronized to CAPTUREx by either software or an event.
The capture register is blocked for an update of new capture data until TCDn.CAPTURExH is read.
| Name: | CAPTURE |
| Offset: | 0x22 + n*0x02 [n=0..1] |
| Reset: | 0x00 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CAPTURE[11:8] | |||||||||
| Access | R | R | R | R | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CAPTURE[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |