21.5.17 Period Buffer Register
This register serves as the buffer for the period register (TCAn.PER). Accessing this register using the CPU or UPDI will affect the PERBV flag.
The TCAn.PERBUFL and TCAn.PERBUFH register pair represents the 16-bit value, TCAn.PERBUF. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01.
| Name: | PERBUF |
| Offset: | 0x36 |
| Reset: | 0xFFFF |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PERBUF[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PERBUF[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 15:8 – PERBUF[15:8] Period Buffer High Byte
These bits hold the MSB of the 16-bit period buffer register.
Bits 7:0 – PERBUF[7:0] Period Buffer Low Byte
These bits hold the LSB of the 16-bit period buffer register.