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PIC18(L)F26/45/46K40 Family Silicon Errata and Data Sheet Clarification
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PIC18F26K40
PIC18F45K40
PIC18F46K40
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1
Silicon Errata Issues
1.1
Module: ADCC - Analog-to-Digital Converter with Computation
Introduction
Silicon Issue Summary
1
Silicon Errata Issues
1.1
Module: ADCC - Analog-to-Digital Converter with Computation
1.1.1
ADC Conversion
1.1.2
ADCRC Oscillator Operation in Sleep
1.1.3
Missing Codes with FVR Reference
1.1.4
ADC GO Bit May Remain Set When the Clock Source is F
OSC
1.1.5
ADCC Burst Average Mode
1.1.6
Double Sample Conversions
1.1.7
ADC Conversion Acquisition Time in Sleep (ADCC)
1.1.8
ADC Short in Pre-Charge State
1.2
Module: PIC18 Debug Executive
1.3
Module: PIC18 Core
1.4
Module: Program Flash Memory (PFM)
1.5
Module: MSSP
1.6
Module: Electrical Specifications
1.7
Module: Timer0
1.8
Module: Windowed Watchdog Timer (WWDT)
1.9
Module: Nonvolatile Memory (NVM)
1.10
Module: Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
1.11
Module: Capture/Compare/PWM Module (CCP)
1.12
Module: Low-Voltage In-Circuit Serial Programming™ (LVP)
2
Data Sheet Clarifications
3
Appendix A: Revision History
Microchip Information
1.1 Module: ADCC - Analog-to-Digital Converter with Computation
