3.1 I/O Multiplexing


VQFN32 TQFP32	VQFN28	SPDIP28 SOIC28 SSOP28	SSOP20	SOIC14 SSOP14	Pin name ^(1,2)	Special	ADC0	ACn	USART0	SPI0	TWI0⁽⁴⁾	TCE0+WEX0	TCBn	TCF0	EVSYS	CCL-LUTn
30	26	22	4	4	PA0	XTAL32K1 EXTCLK			TxD	MOSI⁽³⁾	SDA(H)⁽³⁾	WO0 WO0⁽³⁾		WO0		0,IN0 0,IN0⁽³⁾
31	27	23	5	5	PA1	XTAL32K2			RxD	MISO⁽³⁾	SCL(H)⁽³⁾	WO1 WO1⁽³⁾		WO1		0,IN1 0,IN1⁽³⁾
32	28	24	6	-	PA2	TWI Fm+	AIN22		XCK TxD⁽³⁾		SDA(H)	WO2 WO0⁽³⁾	0,WO		EVOUTA	0,IN2 0,IN2⁽³⁾
1	1	25	7	-	PA3	TWI Fm+	AIN23		XDIR RxD⁽³⁾		SCL(H)	WO3 WO1⁽³⁾	1,WO			0,OUT
2	2	26	8	-	PA4		AIN24		TxD⁽³⁾	MOSI		WO4 WO2⁽³⁾
3	3	27	9	-	PA5		AIN25		RxD⁽³⁾	MISO		WO5 WO3⁽³⁾
4	4	28	10	-	PA6		AIN26	1,AINP5	XCK⁽³⁾	SCK		WO6 WO4⁽³⁾		WO0⁽³⁾		0,OUT⁽³⁾
5	5	1	11	-	PA7	CLKOUT	AIN27	0,OUT 1,AINP6 1,OUT	XDIR⁽³⁾	SS		WO7 WO5⁽³⁾		WO1⁽³⁾	EVOUTA⁽³⁾
6	6	2	12	6	PC0		AIN28			SCK⁽³⁾ MOSI⁽³⁾		WO0⁽³⁾ WO2⁽³⁾				1,IN0
7	7	3	13	7	PC1		AIN29		TxD⁽³⁾	SS⁽³⁾ MISO⁽³⁾ MOSI⁽³⁾		WO1⁽³⁾ WO3⁽³⁾				1,IN1
8	8	4	14	8	PC2	TWI Fm+	AIN30	0,AINN3 1,AINN3	RxD⁽³⁾	SCK⁽³⁾ MISO⁽³⁾	SDA(C) SDA(H)⁽³⁾ SDA(C)⁽³⁾	WO2⁽³⁾ WO4⁽³⁾			EVOUTC	1,IN2
9	9	5	15	9	PC3	TWI Fm+	AIN31	0,AINP4 1,AINP4	XCK⁽³⁾	SS⁽³⁾ SCK⁽³⁾	SCL(C) SCL(H)⁽³⁾ SCL(C)⁽³⁾	WO3⁽³⁾ WO5⁽³⁾				1,OUT
10	10	6	-	-	PD0		AIN0	0,AINN1 1,AINN1				WO0⁽³⁾				2,IN0 2,IN0⁽³⁾
11	11	7	-	-	PD1		AIN1					WO1⁽³⁾				2,IN1 2,IN1⁽³⁾
12	12	8	-	-	PD2		AIN2	0,AINP0 1,AINP0				WO2⁽³⁾			EVOUTD	2,IN2 2,IN2⁽³⁾
13	13	9	-	-	PD3		AIN3	0,AINN0 1,AINP1				WO3⁽³⁾				2,OUT
14	14	10	16	10	PD4		AIN4	0,AINP5 1,AINP2	TxD⁽³⁾	MOSI⁽³⁾		WO4⁽³⁾
15	15	11	17	11	PD5		AIN5	0,AINP6 1,AINN0	RxD⁽³⁾	MISO⁽³⁾		WO5⁽³⁾
16	16	12	18	12	PD6		AIN6	0,AINP3 1,AINP3	XCK⁽³⁾	SCK⁽³⁾		WO6⁽³⁾				2,OUT⁽³⁾
17	17	13	19	13	PD7	VREFA	AIN7	0,AINN2 1,AINN2	XDIR⁽³⁾	SS⁽³⁾		WO7⁽³⁾			EVOUTD⁽³⁾
18	18	14	20	14	VDD
19	19	15	1	1	GND
20	20	16	-	-	PF0		AIN16					WO0⁽³⁾				3,IN0
21	21	17	-	-	PF1		AIN17					WO1⁽³⁾				3,IN1
22	-	-	-	-	PF2		AIN18					WO2⁽³⁾			EVOUTF	3,IN2
23	-	-	-	-	PF3		AIN19					WO3⁽³⁾				3,OUT
24	-	-	-	-	PF4		AIN20					WO4⁽³⁾	0,WO⁽³⁾	WO0⁽³⁾
25	-	-	-	-	PF5		AIN21					WO5⁽³⁾	1,WO⁽³⁾	WO1⁽³⁾
26	22	18	2	2	PF6⁽⁵⁾	RESET			RxD⁽³⁾
27	23	19	3	3	PF7	UPDI			TxD⁽³⁾	SS⁽³⁾					EVOUTF⁽³⁾
28	24	20	-	-	VDD
29	25	21	-	-	GND

Note:

The pin names are Pxn type, with x being the PORT instance (A, B, C, ...) and n, the PIN. The notation for signals is PORTx_PINn. All pins can be used as event inputs.
All the pins can be used for external interrupt.
Alternate pin positions. To select alternate positions, refer to the PORTMUX - Port Multiplexer section.
The TWI pins that can be used as hosts or clients are marked H. The pins with client-only are marked C.
Input-only.