13.4 System and Peripheral Clock Generation (CLKGEN)

This sub-module generates the system clocks needed for the device from a single source clock. In addition, this module also shuts down these clocks during the Sleep mode.

There are two types of clocks generated by this block called core clocks and peripheral clocks. The system clock (SYS_CLK) is typically used by the CPU. It supports components, such as memory subsystems, and fast peripherals. The peripheral bus clocks (pb_clk) are used to clock slow peripheral devices attached to the pb_bus. The pb_clk[n] outputs are based on the SYS_CLK frequency with a fixed divisor. The divisor is determined by the value of the PBxDIV registers.

The system and peripheral clocks are stopped when in the Sleep mode. The clocks are restarted by disabling the sleep enable.