20.4.2 Register Description

Some peripherals include module enable bits internally. The PMD bit is used for clock gating of the PBx_CLK and GCLK for all peripherals. If the peripheral also includes the internal enable bit, the PMD bit and internal enable configuration bit must be configured by software for that peripheral.

The following table summarizes each peripheral's enable and disable controls. For more details on the internal enable/disable control, see Peripheral Access Controller (PAC) from Related Links.

Table 20-1. Module Enable/Disable Controls
ModulePMD controlModule controlEnable/Disable Strategy
ACPresentPresentDisable at PMD or Module
AESPresentPresentDisable at PMD or Module
CCLNAPresentDisable at Module
CMCCNAPresentDisable at Module
DMACNAPresentDisable at Module
DSUNANAAlways Enabled (Dynamic On/Off)
EICNAPresentDisable at Module
EVSYSNANAAlways Enabled (Dynamic On/Off)
FREQMNAPresentDisable at Module
ICMPresentPresentEnable both/Disable at PMD or Module
PACNANAAlways Enabled (Dynamic On/Off)
PUKCCPresentNADisable at PMD
QSPIPresentPresentEnable both/Disable at PMD or Module
RAMECCNANADisable using fuse bit
RTCCPresentPresentEnable both/Disable at PMD or Module
SERCOMPresentPresentEnable both/Disable at PMD or Module
TCPresentPresentEnable both/Disable at PMD or Module
TCCPresentPresentEnable both/Disable at PMD or Module
TRNGPresentPresentEnable both/Disable at PMD or Module
Note: For Modules with both PMD control and Module control, Enable = PMDx=0 AND Module Enable=1, Disable =PMDx=1 OR Module Enable=0.