6.2.9.1 Peripheral Pin Select Output Register

Note:

For the Offset address, see the Peripheral Pin Select Output Registers table in the I/O Ports Control Registers from Related Links.
Register values can only be changed if the IOLOCK Configuration bit (CFGCON0.IOLOCK) = 0.

Name:	RPnR
Offset:	See the following Note
Reset:	0x0
Property:	-


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
				RPnR[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 4:0 – RPnR[4:0] Peripheral Pin Select Output Register

Output bits. For output pin selection values, see Remappable Output Pin Configuration – Group1, Remappable Output Pin Configuration – Group2, Remappable Output Pin Configuration – Group3, and Remappable Output Pin Configuration – Group4 tables in the Pin Output RP Registers from Related Links.

Note: This field is only writable, when CFGCON0.IOLOCK = 0.