17.4.6 Resetting the DMT

The DMT can be reset in two ways: one way is after a system reset and another way is by writing an ordered sequence to the DMT pre-clear register (DMTPRECLR) and DMT clear register (DMTCLR) in a specific two-step sequence.

Clearing the DMT counter value requires the following sequence of operations:
  1. The STEP1[7:0] bits in the DMTPRECLR register must be written as ‘01000000’ (0x40). This action sets the “enable for clearing” state, which enables the DMT to be cleared by step 2.
  2. The STEP2[7:0] bits in the DMTCLR register must be written as ‘00001000’ (0x08). This can only be done if preceded by step 1 and if the DMT is in the open window interval.
Once these values are written, following are cleared to zero:
  • DMTCNT counter
  • DMTPRECLR register
  • DMTCLR register
  • DMTSTAT register

If any value other than 0x40 is written to the STEP1x bits, the BAD1 bit in the DMTSTAT register will be set and it causes a DMT event to occur. Any value other than 0x08, written to the STEP2x bits, will cause the BAD2 bit to be set in the DMTSTAT register. Also, if step 2 is not preceded by step 1, or step 2 is not carried out in the open window interval, it causes the BAD2 flag to be set. Immediately, a DMT event will occur. In both these cases, the DMTEVENT bit in the DMTSTAT register will be set. Refer to the flowchart shown in the following figure.

Figure 17-2. Flowchart for Clearing the DMT