43.4 I/O Lines Description
| Signal Name | Description | Type |
|---|---|---|
| MIPI_CLKP | MIPI DPHY differential output clock lane | Input/Output |
| MIPI_CLKN | ||
| MIPI_DP0 | MIPI DPHY differential output data lane 0 | Input/Output |
| MIPI_DN0 | ||
| MIPI_DP1 | MIPI DPHY differential output data lane 1 | Input/Output |
| MIPI_DN1 | ||
| MIPI_DP2 | MIPI DPHY differential output data lane 2 | Input/Output |
| MIPI_DN2 | ||
| MIPI_DP3 | MIPI DPHY differential output data lane 3 | Input/Output |
| MIPI_DN3 | ||
| MIPI_REXT | Calibration reference resistor | Input/Output |