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Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF
Introduction
Features
1 Configuration Summary
2 Block Diagram
3 Signal Description
4 Microchip Recommended Power Management Solutions
4.1 MCP16502 PMIC
4.2 MCP16501 PMIC
5 Safety and Security Features
5.1 Design for Safety and IEC60730 Class B Certification
5.2 Design for Security
5.3 Safety and IEC 60730 Features
5.4 Security Features
6 Package and Pinout
6.1 Package
6.2 Pinout
7 Peripherals
7.1 Peripheral Mapping
7.2 Peripheral Identifiers
7.3 FLEXCOM Features
7.4 Peripheral Signal Multiplexing on I/O Lines
8 Arm926EJ-S Processor
9 Debug and Test
9.1 Description
9.2 Embedded Characteristics
9.3 Block Diagram
9.4 Application Examples
9.5 Debug and Test Pin Description
9.6 Functional Description
10 Bus Matrix (MATRIX)
10.1 Description
10.2 Embedded Characteristics
10.3 Special Bus Granting Techniques
10.4 No Default Host
10.5 Last Access Host
10.6 Fixed Default Host
10.7 Arbitration
10.8 Register Write Protection
10.9 Register Summary
11 DMA Controller (XDMAC)
11.1 Description
11.2 Embedded Characteristics
11.3 Block Diagram
11.4 DMA Controller Peripheral Connections
11.5 Functional Description
11.6 Linked List Descriptor Operation
11.7 XDMAC Maintenance Software Operations
11.8 XDMAC Software Requirements
11.9 Register Summary
12 Boot Strategies
12.1 Standard Boot Strategy
12.2 Secure Boot Strategy
12.3 Hardware and Software Constraints
13 SYSTEM CONTROLLER SUBSYSTEM
13.1 Block Diagram
13.2 Components
13.3 Product Dependencies
13.4 Special Functions in SFR
14 System Controller Write Protection (SYSCWP)
14.1 Functional Description
14.2 Register Summary
15 Advanced Interrupt Controller (AIC)
15.1 Description
15.2 Embedded Characteristics
15.3 Block Diagram
15.4 Application Block Diagram
15.5 Detailed Block Diagram
15.6 I/O Line Description
15.7 Product Dependencies
15.8 Functional Description
15.9 Register Summary
16 Boot Sequence Controller (BSC)
16.1 Description
16.2 Embedded Characteristics
16.3 Product Dependencies
16.4 Register Summary
17 General Purpose Backup Registers (GPBR)
17.1 Description
17.2 Embedded Characteristics
17.3 Register Summary
18 Watchdog Timer (WDT)
18.1 Description
18.2 Embedded Characteristics
18.3 Block Diagram
18.4 Functional Description
18.5 Register Summary
19 Reset Controller (RSTC)
19.1 Description
19.2 Embedded Characteristics
19.3 Block Diagram
19.4 Functional Description
19.5 Register Summary
20 Real-Time Timer (RTT)
20.1 Description
20.2 Embedded Characteristics
20.3 Block Diagram
20.4 Functional Description
20.5 Register Summary
21 Real-time Clock (RTC)
21.1 Description
21.2 Embedded Characteristics
21.3 Block Diagram
21.4 Product Dependencies
21.5 Functional Description
21.6 Register Summary
22 Shutdown Controller (SHDWC)
22.1 Description
22.2 Embedded Characteristics
22.3 Block Diagram
22.4 I/O Lines Description
22.5 Product Dependencies
22.6 Functional Description
22.7 Register Summary
23 Periodic Interval Timer (PIT)
23.1 Description
23.2 Embedded Characteristics
23.3 Block Diagram
23.4 Functional Description
23.5 Register Summary
24 64-bit Periodic Interval Timer (PIT64B)
24.1 Description
24.2 Embedded Characteristics
24.3 Block Diagram
24.4 Product Dependencies
24.5 Functional Description
24.6 Register Summary
25 Debug Unit (DBGU)
25.1 Description
25.2 Embedded Characteristics
25.3 Block Diagram
25.4 Product Dependencies
25.5 Functional Description
25.6 Register Summary
26 Special Function Registers (SFR)
26.1 Description
26.2 Embedded Characteristics
26.3 Register Summary
27 Slow Clock Controller (SCKC)
27.1 Description
27.2 Embedded Characteristics
27.3 Block Diagram
27.4 Functional Description
27.5 Register Summary
28 Clock Generator
28.1 Description
28.2 Embedded Characteristics
28.3 Block Diagram
28.4 Slow Clock
28.5 Main Clock
28.6 PLL Controls
29 Power Management Controller (PMC)
29.1 Description
29.2 Embedded Characteristics
29.3 Block Diagram
29.4 Processor Clock Controller
29.5 USB Clock Controller
29.6 Free-Running Processor Clock
29.7 Peripheral and Generic Clock Controller
29.8 Programmable Clock Output Controller
29.9 Ultra-Low Power Mode and Fast Start-Up
29.10 Main Crystal Oscillator Failure Detection
29.11 32.768 kHz Crystal Oscillator Frequency Monitor
29.12 MCK Frequency Monitor
29.13 Recommended Programming Sequence
29.14 Clock Switching Details
29.15 Register Write Protection
29.16 Register Summary
30 Parallel Input/Output Controller (PIO)
30.1 Description
30.2 Embedded Characteristics
30.3 Block Diagram
30.4 Product Dependencies
30.5 Functional Description
30.6 Register Summary
31 MEMORIES
31.1 Embedded Memories
31.2 External Memory
31.3 Product Dependencies
31.4 Special Functions in SFR
32 Static Memory Controller (SMC)
32.1 Description
32.2 Embedded Characteristics
32.3 I/O Lines Description
32.4 Interrupt Source
32.5 Multiplexed Signals
32.6 Application Example
32.7 Product Dependencies
32.8 External Memory Mapping
32.9 Connection to External Devices
32.10 Standard Read and Write Protocols
32.11 Automatic Wait States
32.12 Data Float Wait States
32.13 External Wait
32.14 Slow Clock Mode
32.15 Asynchronous Page Mode
32.16 Register Write Protection
32.17 Security and Safety Analysis and Reports
32.18 Scrambling/Unscrambling Function
32.19 Clearing Scrambling Keys on a Tamper Event
32.20 Register Summary
33 Programmable Multibit Error Correction Code Controller (PMECC)
33.1 Description
33.2 Embedded Characteristics
33.3 Block Diagram
33.4 Functional Description
33.5 Software Implementation
33.6 Register Summary
34 Programmable Multibit ECC Error Location Controller (PMERRLOC)
34.1 Description
34.2 Embedded Characteristics
34.3 Block Diagram
34.4 Functional Description
34.5 Register Summary
35 DDR-SDRAM Controller (MPDDRC)
35.1 Description
35.2 Embedded Characteristics
35.3 Block Diagram
35.4 Product Dependencies, Initialization Sequence
35.5 Functional Description
35.6 Software Interface/SDRAM Organization, Address Mapping
35.7 Register Summary
36 OTP Memory Controller (OTPC)
36.1 Description
36.2 Embedded Characteristics
36.3 Block Diagram
36.4 Product Dependencies
36.5 Functional Description
36.6 Register Summary
37 IMAGE SUBSYSTEM
37.1 Block Diagram
37.2 Components
37.3 Product Dependencies
37.4 LVDS I/O Configuration
37.5 Special Functions in SFR
38 LCD Controller (LCDC)
38.1 Description
38.2 Embedded Characteristics
38.3 Block Diagram
38.4 I/O Lines Description
38.5 Product Dependencies
38.6 Functional Description
38.7 Register Summary
39 Low Voltage Differential Signaling Controller (LVDSC)
39.1 Description
39.2 Embedded Characteristics
39.3 Block Diagram
39.4 I/O Lines Description
39.5 Product Dependencies
39.6 Functional Description
39.7 Register Summary
40 2D Graphics Engine (GFX2D)
40.1 Description
40.2 Embedded Characteristics
40.3 Block Diagram
40.4 Functional Description
40.5 Register Summary
41 Display Serial Interface (DSI)
41.1 Description
41.2 Embedded Characteristics
41.3 Block Diagram
41.4 I/O Lines Description
41.5 Product Dependencies
41.6 Functional Description
41.7 Register Summary
42 Camera Serial Interface (CSI)
42.1 Description
42.2 Embedded Characteristics
42.3 I/O Lines Description
42.4 Block Diagram
42.5 Product Dependencies
42.6 Functional Description
42.7 Register Summary
43 CSI-2 Demultiplexer Controller (CSI2DC)
43.1 Description
43.2 Embedded Characteristics
43.3 Block Diagram
43.4 I/O Lines Description
43.5 Functional Description
43.6 Register Summary
44 Image Sensor Controller (ISC)
44.1 Description
44.2 Embedded Characteristics
44.3 ISC Block Diagram and Use Cases
44.4 I/O Lines Description
44.5 Product Dependencies
44.6 Functional Description
44.7 Register Summary
45 AUDIO SUBSYSTEM
45.1 Components
45.2 Product Dependencies
45.3 Special Functions in SFR
46 Audio Class D Amplifier (CLASSD)
46.1 Description
46.2 Embedded Characteristics
46.3 Block Diagram
46.4 Pin Name List
46.5 Product Dependencies
46.6 Functional Description
46.7 Register Summary
47 Inter-IC Sound Multi-Channel Controller (I2SMCC)
47.1 Description
47.2 Embedded Characteristics
47.3 Block Diagram
47.4 I/O Lines Description
47.5 Product Dependencies
47.6 Functional Description
47.7 Register Summary
48 Synchronous Serial Controller (SSC)
48.1 Description
48.2 Embedded Characteristics
48.3 Block Diagram
48.4 Application Block Diagram
48.5 SSC Application Examples
48.6 Pin Name List
48.7 Product Dependencies
48.8 Functional Description
48.9 Register Summary
49 CRYPTOGRAPHY SUBSYSTEM
49.1 Components
49.2 Product Dependencies
49.3 Special Functions in SFR
50 Advanced Encryption Standard (AES)
50.1 Description
50.2 Embedded Characteristics
50.3 Product Dependencies
50.4 Functional Description
50.5 Register Summary
51 Secure Hash Algorithm (SHA)
51.1 Description
51.2 Embedded Characteristics
51.3 Product Dependencies
51.4 Functional Description
51.5 Register Summary
52 Triple Data Encryption Standard (TDES)
52.1 Description
52.2 Embedded Characteristics
52.3 Product Dependencies
52.4 Functional Description
52.5 Register Summary
53 True Random Number Generator (TRNG)
53.1 Description
53.2 Embedded Characteristics
53.3 Block Diagram
53.4 Product Dependencies
53.5 Functional Description
53.6 Register Summary
54 Physical Unclonable Functions (PUF)
54.1 Description
54.2 Embedded Characteristics
54.3 Block Diagram
54.4 Product Dependencies
54.5 Functional Description
54.6 Register Summary
55 CONNECTIVITY SUBSYSTEM
55.1 Block Diagram
55.2 Components
55.3 FLEXCOM Features
55.4 Product Dependencies
55.5 Special Functions in SFR
56 Ethernet MAC (GMAC)
56.1 Description
56.2 Embedded Characteristics
56.3 Block Diagram
56.4 Signal Interfaces
56.5 Product Dependencies
56.6 Functional Description
56.7 Programming Interface
56 Register Summary
57 Flexible Serial Communication Controller (FLEXCOM)
57.1 Description
57.2 Embedded Characteristics
57.3 Block Diagram
57.4 I/O Lines Description
57.5 Product Dependencies
57.6 Register Accesses
57.7 USART Functional Description
57.8 SPI Functional Description
57.9 TWI Functional Description
57.10 Register Summary
58 Quad Serial Peripheral Interface (QSPI)
58.1 Description
58.2 Embedded Characteristics
58.3 Block Diagram
58.4 Signal Description
58.5 Product Dependencies
58.6 Functional Description
58.7 Register Summary
59 Secure Digital MultiMedia Card Controller (SDMMC)
59.1 Description
59.2 Embedded Characteristics
59.3 Reference Documents
59.4 Block Diagram
59.5 Application Block Diagram
59.6 Pin Name List
59.7 Product Dependencies
59.8 SD/SDIO Operating Mode
59.9 e.MMC Operating Mode
59.10 Register Summary
60 Controller Area Network (MCAN)
60.1 Description
60.2 Embedded Characteristics
60.3 Block Diagram
60.4 Product Dependencies
60.5 Functional Description
60.6 Register Summary
61 Timer Counter (TC)
61.1 Description
61.2 Embedded Characteristics
61.3 Block Diagram
61.4 Pin List
61.5 Product Dependencies
61.6 Functional Description
61.7 Register Summary
62 Pulse Width Modulation Controller (PWM)
62.1 Description
62.2 Embedded Characteristics
62.3 Block Diagram
62.4 I/O Lines Description
62.5 Product Dependencies
62.6 Functional Description
62.7 Register Summary
63 USB SUBSYSTEM
63.1 Block Diagram
63.2 Components
63.3 Product Dependencies
63.4 Special Functions in SFR
64 USB Device High Speed Port (UDPHS)
64.1 Description
64.2 Embedded Characteristics
64.3 Block Diagram
64.4 Typical Connection
64.5 Product Dependencies
64.6 Functional Description
64 Register Summary
65 USB Host High Speed Port (UHPHS)
65.1 Description
65.2 Embedded Characteristics
65.3 Block Diagram
65.4 Typical Connection
65.5 Product Dependencies
65.6 Functional Description
65 Register Summary
66 Analog-to-Digital Controller (ADC)
66.1 Description
66.2 Embedded Characteristics
66.3 Block Diagram
66.4 Signal Description
66.5 Product Dependencies
66.6 Functional Description
66.7 Register Summary
67 Electrical Characteristics
67.1 Electrical Parameters Usage
67.2 Absolute Maximum Ratings
67.3 Recommended Operating Conditions
67.4 Recommended Power Supply Sequencing
67.5 I/O Characteristics
67.6 Digital Peripheral Characteristics
67.7 Analog Peripheral Characteristics
67.8 Power Consumption in Active Mode
67.9 Operation and Power Consumption in Low-Power Modes
68 Mechanical Characteristics
68.1 240-Ball TFBGA Mechanical Characteristics
69 Marking
70 Ordering Information
71 Revision History
71.1 DS60001813A - 03/2023
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