13.3.2 Changing System Frequencies

After ROM code execution, the system clock is set as follows:
  • MAINCK is fed by the main RC oscillator i.e., 12 MHz.
  • PLLA is set to 1.2 GHz.
  • CPU_CLK is set to 600 MHz.
  • MCK is set to 200 MHz.

This is illustrated in the following figure.

Figure 13-2. PMC Rom Code Configuration

To avoid any overclocking during system clock modification, it is recommended to change system frequencies in two steps.

The first step leads to a known and basic intermediate state where all clocks are in a low-frequency range.

For example, the following sequence can be performed:
  1. Set MCK to MAINCK, i.e., 12 MHz.
  2. Set MAINCK to Crystal Oscillator, typically 24 MHz. MCK then runs at 24 MHz.

This intermediate state is illustrated in the following figure.

Figure 13-3. PMC Intermediate Configuration

The second step leads to the final expected state.

Perform the following sequence:
  1. Set PLL to 1.6 GHz, and so PLLACK to 800 MHz.
  2. Set CPU_CLK to 800 MHz.
  3. Set MCK to CPU_CLK/3, i.e., 266 MHz.

The final state is illustrated in the following figure.

Figure 13-4. PMC Final Configuration