31.4.1 DDRC Multiport Enabling

The SFR_REMAP_MP_DDR configuration register includes 14 bits, one for each host. The register has the same function as bit DDR_MP_EN in SFR_CCFG_EBICSA, and can be used instead of DDR_MP_EN for more granularity. If DDR_MP_EN is not enabled, each bit in SFR_REMAP_MP_DDR can be used to perform an individual DDR multiport remapping (bit 0 for Host_0, bit 1 for Host_1, etc.).

This register makes port 0 reachable. It is not used when DDR_MP_EN bit is used.

Refer to 10 Bus Matrix (MATRIX) for a description of hosts and clients.