4.1 MCP16502 PMIC

MCP16502 features four 1A DC-DC buck regulators and two 0.3A auxiliary LDO regulators, and provides a comprehensive interface to the MPU, which includes an interrupt flag and a 1-MHz I²C interface.

The PMIC-processor interface is optimized so that it remains leakage-free in Backup mode. The following figure gives an application schematic example of a SAM9X7 device with a DDR3L-SDRAM system, powered by MCP16502AE. This variant is specifically tailored for SAM9X7 systems with CPU frequency up to 800 MHz. The 3.3V, 1.35V and 1.15V supply rails are fed from DC-DC converters for maximum efficiency. The fourth DC-DC converter (Buck4) of MCP16502AE is left off by default during start-up and its components may be removed, if not needed for other purposes.

The two LDO regulator outputs LOUT1 and LOUT2 are auxiliary power rails available for the application. LOUT1 output is on by default at power-up and its default voltage is set to 1.8V, 2.5V or 3.3V depending on the SELV1 pin connection. Buck4 and LOUT2, off by default at power-up, can be started by software through the I²C control bus to the necessary voltage.

For further details, refer to the MCP16502 documentation on www.microchip.com.