33.2 Embedded Characteristics

  • 8-bit NAND Flash Data Bus Support
  • Multibit Error Correcting Code
  • Algorithm Based on Binary Shortened Bose, Chaudhuri and Hocquenghem (BCH) Codes
  • Programmable Error Correcting Capability: 2, 4, 8, 12 and 24 Bits of Error per Sector
  • Programmable Sector Size: 512 Bytes or 1024 Bytes
  • Programmable Number of Sectors per Page: 1, 2, 4 or 8 Sectors of Data per Page
  • Programmable Spare Area Size
  • Supports Spare Area ECC Protection
  • Supports 8 Kbytes Page Size Using 1024 Bytes per Sector and 4 Kbytes Page Size Using 512 Bytes per Sector
  • Configurable through APB Interface
  • Interrupt-Driven Multibit Error Detection