60.5.2 Timestamp Generation

• Internal Timestamp Generation

For internal timestamp generation, the MCAN supplies a 16-bit wrap-around counter. A prescaler (MCAN_TSCC.TCP) can be configured to clock the counter in multiples of CAN bit times (1…16). The counter is readable via MCAN_TSCV.TSC. A write access to the Timestamp Counter Value register (MCAN_TSCV) resets the counter to zero. When the timestamp counter wraps around, the interrupt flag MCAN_IR.TSW is set.

On start of frame (SOF) reception/transmission, the counter value is captured and stored in the timestamp section of an Rx Buffer/Rx FIFO (RXTS[15:0]) or Tx Event FIFO (TXTS[15:0]) element.

MCAN_TSCC.TSS can be used to capture the external 16-bit timebase vector input of the MCAN as timestamp instead of the internal 16-bit counter.

• Timestamp Generation Using an External TSU

A timestamping unit (TSU) for generation of 32-bit timestamps according to CiA 603 is connected to the MCAN TSU interface. External timestamping is enabled when MCAN_CCCR.UTSU = 1.

To filter for Sync messages, a Standard or Extended Filter element must be configured with the Sync message ID and bit SSYNC resp. ESYNC set to 1.

At the end of frame (EOF) reception/transmission, the timestamp is captured by the TSU. The number of the TSU Timestamp register which holds the captured timestamp is sent to the MCAN by a timestamp pointer (TSP) and stored in the related Rx Buffer/Rx FIFO element (R1B.RXTSP[2:0]) resp. Tx Event FIFO element (E1B.TXTSP[2:0]).