28.4 Registers – USBn – Universal Serial Bus Device Controller
USBnUniversal Serial Bus Device
Controller
Universal Serial Bus Device Controller
| Extended I/O | 0x80 |
STATUS[n]
| OUTCLR | 16 4 0index n |
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | CTRLA | 7:0 | ENABLE | FIFOEN | STFRNUM | MAXEP[3:0] | ||||
| 0x01 | CTRLB | 7:0 | URESUME | GNAUTO | GNAK | ATTACH | ||||
| 0x02 | BUSSTATE | 7:0 | WTRSM | URESUME | DRESUME | SUSPENDED | BUSRST | |||
| 0x03 | ADDR | 7:0 | ADDR[6:0] | |||||||
| 0x04 | FIFOWP | 7:0 | FIFOWP[4:0] | |||||||
| 0x05 | FIFORP | 7:0 | FIFORP[4:0] | |||||||
| 0x06 | EPPTR | 7:0 | EPPTR[7:0] | |||||||
| 15:8 | EPPTR[15:8] | |||||||||
| 0x07 | INTCTRLA | 7:0 | SOF | SUSPEND | RESUME | RESET | STALLED | UNF | OVF | |
| 0x08 | INTCTRLB | 7:0 | TRNCOMPL | GNDONE | SETUP | |||||
| 0x09 | INTFLAGSA | 7:0 | SOF | SUSPEND | RESUME | RESET | STALLED | UNF | OVF | |
| 0x0A | INTFLAGSB | 7:0 | TRNCOMPL | RMWBUSY | GNDONE | SETUP | ||||
0x0B ... 0x3F | Reserved | |||||||||
| 0x40 | STATUS[0].OUTCLR | 7:0 | RMWSTATUS[7:0] | |||||||
| 0x41 | STATUS[0].OUTSET | 7:0 | RMWSTATUS[7:0] | |||||||
| 0x42 | STATUS[0].INCLR | 7:0 | RMWSTATUS[7:0] | |||||||
| 0x43 | STATUS[0].INSET | 7:0 | RMWSTATUS[7:0] | |||||||
| ... | ||||||||||
| 0x7C | STATUS[15].OUTCLR | 7:0 | RMWSTATUS[7:0] | |||||||
| 0x7D | STATUS[15].OUTSET | 7:0 | RMWSTATUS[7:0] | |||||||
| 0x7E | STATUS[15].INCLR | 7:0 | RMWSTATUS[7:0] | |||||||
| 0x7F | STATUS[15].INSET | 7:0 | RMWSTATUS[7:0] | |||||||