3.2 Timer1 Mode for Compare

Timer1 must be operating synchronously to the system clock for the CCP module to use the compare feature. When Timer1 uses the internal instruction clock (FOSC/4) as its clock source, clock synchronization is handled by module hardware automatically. When Timer1 uses an external clock source, the Timer External Clock Input Synchronization Control (SYNC) bit must be clear (SYNC = 0) so that the external source is synchronized with the system clock. If the Timer clock source is not synchronized, a clock collision may occur and the comparison may be invalid.

See the “TMR1 - Timer1 Module with Gate Control” chapter in the device data sheet for more information on configuring Timer1.

Important: Timer1 should not be clocked from the system clock (FOSC) in Compare mode. In order for Compare mode to recognize the trigger event on the CCPx pin, Timer1 must be clocked from the instruction clock (FOSC/4) or from an external clock source.