3.3 Programming Algorithms

The device uses internal latches to temporarily store the 14-bit words used for programming. The data latches allow the user to program a full row with a single Begin Internally Timed Programming or Begin Externally Timed Programming command. The Load Data for NVM command is used to load a single data latch. The data latch will hold the data until the Begin Internally Timed Programming or Begin Externally Timed Programming command is given.

The data latches are aligned with the LSbs of the address. The address at the time the Begin Internally Timed Programming or Begin Externally Timed Programming command is given will determine which memory row is written. Writes cannot cross a physical row boundary. For example, attempting to write from address 0002h-0021h in a 32-latch device will result in data being written to 0020h-003Fh.

If more than the maximum number of latches are written without a Begin Internally Timed Programming or Begin Externally Timed Programming command, the data in the data latches will be overwritten. The following flowcharts show the recommended flowcharts for programming.

Important: The Program Flash Memory region is programmed one row (32 words) at a time (Figure 3-19), while the Configuration Words and Data EEPROM are programmed one word at a time (Figure 3-18). The value of the PC at the time of issuing the Begin Internally Timed Programming or Begin Externally Timed Programming command determines what row (of Program Flash Memory), or what word (of Configuration Word/EEPROM) will get programmed.
Figure 3-16. Device Program/Verify Flowchart
Note:
  1. See Load PC Address.
  2. See Row Erase Program Memory.
Figure 3-17. Program Memory Flowchart
Note:
  1. This step is optional if the device has already been erased or has not been previously programmed.
  2. If the device is code-protected or must be completely erased, then Bulk Erase the device per Figure 3-21.
  3. See Bulk Erase.
Figure 3-18. One-Word Program Cycle
Figure 3-19. Multiple-Word Program Cycle
Figure 3-20. Configuration Memory Program Flowchart
Note:
  1. This step is optional if the device is erased or not previously programmed.
  2. See Begin Internally Timed Programming.
Figure 3-21. Bulk Erase Flowchart