27.5.3 Status

The status register contains the busy and OK information. It is not writable, only readable.

Name: STATUS
Offset: 0x02
Reset: 0x02
Property: -

Bit 76543210 
       OKBUSY 
Access RR 
Reset 10 

Bit 1 – OK CRC OK

When this bit is read as 1, the previous CRC completed successfully. The bit is set to '1' from Reset, but is cleared to '0' when enabling. As long as the CRC module is busy, it will be read '0'. When running continuously, the CRC status must be assumed OK until it fails or is stopped by the user.

Bit 0 – BUSY CRC Busy

When this bit is read as 1, the CRC module is busy. As long as the module is busy, the access to the control registers are limited. See CTRLA27.5.1 Control A and CTRLB27.5.2 Control B for more information.