7.5.5.2.2 Output Mapping in PIC32CX-BZ6 Family of Devices

The following tables provide output mapping in PIC32CX-BZ6 family of devices.

Table 7-8. PPS Output Groups
Group 1Group 2Group 3Group 4Group 5Group 6
OffOffOffOffOffOff
SERCOM0_PAD3CCLO1CCLO0CCLO1CCLO0SERCOM0_PAD1
SERCOM0_PAD2SERCOM0_PAD0SERCOM0_PAD0SERCOM0_PAD2SERCOM1_PAD3SERCOM1_PAD1
SERCOM1_PAD0SERCOM0_PAD3SERCOM0_PAD3SERCOM0_PAD0SERCOM2_PAD0SERCOM2_PAD1
SERCOM1_PAD2SERCOM0_PAD2SERCOM1_PAD2SERCOM1_PAD3TCC0_WO4SERCOM3_PAD1
SERCOM2_PAD3SERCOM1_PAD3SERCOM1_PAD0SERCOM1_PAD0TCC0_WO2SERCOM4_PAD1
SERCOM2_PAD2SERCOM1_PAD2SERCOM1_PAD3SERCOM2_PAD2TCC0_WO1SERCOM5_PAD1
SERCOM3_PAD0SERCOM2_PAD0SERCOM2_PAD0SERCOM2_PAD0TCC1_WO4QSPI_SCK
SERCOM3_PAD2SERCOM2_PAD3SERCOM2_PAD3SERCOM3_PAD3TCC1_WO2REFO1
SERCOM4_PAD3SERCOM2_PAD2SERCOM3_PAD2SERCOM3_PAD0TCC1_WO1REFO2
SERCOM4_PAD2SERCOM3_PAD3SERCOM3_PAD0SERCOM4_PAD2TC8_WO1REFO3
SERCOM5_PAD0SERCOM3_PAD2SERCOM3_PAD3SERCOM4_PAD0TC9_WO1REFO4
SERCOM5_PAD2SERCOM4_PAD0SERCOM4_PAD0SERCOM5_PAD3QSPI_CSOff
TCC0_WO0SERCOM4_PAD3SERCOM4_PAD3SERCOM5_PAD0QEICCMP0Off
TCC0_WO4SERCOM4_PAD2SERCOM5_PAD2TCC0_WO3GMAC_TSUCOMPOff
TCC1_WO0SERCOM5_PAD3SERCOM5_PAD0TCC0_WO1TSTBUS3Off
TCC1_WO4SERCOM5_PAD2SERCOM5_PAD3TCC0_WO5TSTBUS7Off
TCC2_WO0TCC0_WO1TCC0_WO2TCC1_WO3TSTBUS11Off
TC0_WO1TCC0_WO5TCC0_WO0TCC1_WO1OffOff
TC1_WO0TCC0_WO3TCC0_WO4TCC1_WO5OffOff
TC2_WO0TCC1_WO1TCC1_WO2TCC2_WO1OffOff
TC3_WO0TCC1_WO5TCC1_WO0TC0_WO0OffOff
TC4_WO0TCC1_WO3TCC1_WO4TC1_WO1OffOff
TC5_WO0TCC2_WO1TCC2_WO0TC2_WO1OffOff
TC6_WO0TC0_WO1TC0_WO0TC3_WO1OffOff
TC7_WO0TC1_WO1TC1_WO0TC4_WO1OffOff
TC8_WO0TC2_WO1TC2_WO0TC5_WO1OffOff
QSPI_CSTC3_WO1TC3_WO0TC6_WO1OffOff
QSPI_DATA3TC4_WO1TC4_WO0TC7_WO1OffOff
QSPI_DATA2TC5_WO1TC5_WO0TC9_WO0OffOff
QSPI_DATA1TC6_WO1TC6_WO0QSPI_CSOffOff
QEICCMP0TC7_WO1TC7_WO0QSPI_DATA2OffOff
TSTBUS0TC8_WO1TC8_WO0QSPI_DATA1OffOff
TSTBUS4TC9_WO0TC9_WO1QSPI_DATA0OffOff
TSTBUS8QSPI_CSQSPI_CSTSTBUS2OffOff
FECTRL1QSPI_DATA0QSPI_DATA1TSTBUS6OffOff
FECTRL2QSPI_DATA3QSPI_DATA0AC_CMP1OffOff
COEX_BT_STATEQSPI_DATA2QSPI_DATA3AC_CMPTOUTOffOff
OffTSTBUS5TSTBUS1CAN1_TXOffOff
OffTSTBUS9TSTBUS10FECTRL3OffOff
OffFECTRL0AC_CMP0FECTRL5OffOff
OffCOEX_RF_ACTAC_CMPTRDYOffOffOff
OffOffFECTRL4OffOffOff
OffOffOffOffOffOff
Table 7-9. Remappable Output Pin Configuration – Group 1
RPn Port PinRPnG1R SFRRPnG1R BitsRPnG1R Value to Peripheral Pin Selection
RPA0RPA0G1RRPA0G1R[5:0]

00 0000 = Off

00 0001 = SERCOM0_PAD3

00 0010 = SERCOM0_PAD2

00 0011 = SERCOM1_PAD0

00 0100 = SERCOM1_PAD2

00 0101 = SERCOM2_PAD3

00 0110 = SERCOM2_PAD2

00 0111 = SERCOM3_PAD0

00 1000 = SERCOM3_PAD2

00 1001 = SERCOM4_PAD3

00 1010 = SERCOM4_PAD2

00 1011 = SERCOM5_PAD0

00 1100 = SERCOM5_PAD2

00 1101 = TCC0_WO0

00 1110 = TCC0_WO4

00 1111 = TCC1_WO0

01 0000 = TCC1_WO4

01 0001 = TCC2_WO0

01 0010 = TC0_WO1

01 0011 = TC1_WO0

01 0100 = TC2_WO0

01 0101 = TC3_WO0

01 0110 = TC4_WO0

01 0111 = TC5_WO0

01 1000 = TC6_WO0

01 1001 = TC7_WO0

01 1010 = TC8_WO0

01 1011 = QSPI_CS

01 1100 = QSPI_DATA3

01 1101 = QSPI_DATA2

01 1110 = QSPI_DATA1

01 1111 = QEICCMP0

10 0000 = TSTBUS0

10 0001 = TSTBUS4

10 0010 = TSTBUS8

10 0011 = FECTRL1

10 0100 = FECTRL2

10 0101 = COEX_BT_STATE

10 0110 = Off

10 0111 = Off

10 1000 = Off

10 1001 = Off

10 1010 = Off

10 1011 - 11 1111 = Off

RPA2RPA2G1RRPA2G1R[5:0]
RPA3RPA3G1RRPA3G1R[5:0]
RPA6RPA6G1RRPA6G1R[5:0]
RPA7RPA7G1RRPA7G1R[5:0]
RPA9RPA9G1RRPA9G1R[5:0]
RPA10RPA10G1RRPA10G1R[5:0]
RPA14RPA14G1RRPA14G1R[5:0]
RPB0RPB0G1RRPB0G1R[5:0]
RPB1RPB1G1RRPB1G1R[5:0]
RPB3RPB3G1RRPB3G1R[5:0]
RPB4RPB4G1RRPB4G1R[5:0]
RPB6RPB6G1RRPB6G1R[5:0]
RPB7RPB7G1RRPB7G1R[5:0]
RPB8RPB8G1RRPB8G1R[5:0]
RPB11RPB11G1RRPB11G1R[5:0]
RPB12RPB12G1RRPB12G1R[5:0]
RPC0RPC0G1RRPC0G1R[5:0]
RPC9RPC9G1RRPC9G1R[5:0]
RPD3RPD3G1RRPD3G1R[5:0]
RPD6RPD6G1RRPD6G1R[5:0]
RPE0RPE0G1RRPE0G1R[5:0]
RPE4RPE4G1RRPE4G1R[5:0]
RPE6RPE6G1RRPE6G1R[5:0]
Table 7-10. Remappable Output Pin Configuration – Group 2
RPn Port PinRPnG2R SFRRPnG2R BitsRPnG2R Value to Peripheral Pin Selection
RPA0RPA0G2RRPA0G2R[5:0]

00 0000 = Off

00 0001 = CCLO1

00 0010 = SERCOM0_PAD0

00 0011 = SERCOM0_PAD3

00 0100 = SERCOM0_PAD2

00 0101 = SERCOM1_PAD3

00 0110 = SERCOM1_PAD2

00 0111 = SERCOM2_PAD0

00 1000 = SERCOM2_PAD3

00 1001 = SERCOM2_PAD2

00 1010 = SERCOM3_PAD3

00 1011 = SERCOM3_PAD2

00 1100 = SERCOM4_PAD0

00 1101 = SERCOM4_PAD3

00 1110 = SERCOM4_PAD2

00 1111 = SERCOM5_PAD3

01 0000 = SERCOM5_PAD2

01 0001 = TCC0_WO1

01 0010 = TCC0_WO5

01 0011 = TCC0_WO3

01 0100 = TCC1_WO1

01 0101 = TCC1_WO5

01 0110 = TCC1_WO3

01 0111 = TCC2_WO1

01 1000 = TC0_WO1

01 1001 = TC1_WO1

01 1010 = TC2_WO1

01 1011 = TC3_WO1

01 1100 = TC4_WO1

01 1101 = TC5_WO1

01 1110 = TC6_WO1

01 1111 = TC7_WO1

10 0000 = TC8_WO1

10 0001 = TC9_WO0

10 0010 = QSPI_CS

10 0011 = QSPI_DATA0

10 0100 = QSPI_DATA3

10 0101 = QSPI_DATA2

10 0110 = TSTBUS5

10 0111 = TSTBUS9

10 1000 = FECTRL0

10 1001 = COEX_RF_ACT

10 1010 = Off

10 1011 - 11 1111 = Off

RPA1RPA1G2RRPA1G2R[5:0]
RPA3RPA3G2RRPA3G2R[5:0]
RPA4RPA4G2RRPA4G2R[5:0]
RPA7RPA7G2RRPA7G2R[5:0]
RPA8RPA8G2RRPA8G2R[5:0]
RPB0RPB0G2RRPB0G2R[5:0]
RPB1RPB1G2RRPB1G2R[5:0]
RPB2RPB2G2RRPB2G2R[5:0]
RPB4RPB4G2RRPB4G2R[5:0]
RPB5RPB5G2RRPB5G2R[5:0]
RPB7RPB7G2RRPB7G2R[5:0]
RPB8RPB8G2RRPB8G2R[5:0]
RPB9RPB9G2RRPB9G2R[5:0]
RPB12RPB12G2RRPB12G2R[5:0]
RPB13RPB13G2RRPB13G2R[5:0]
RPC0RPC0G2RRPC0G2R[5:0]
RPC1RPC1G2RRPC1G2R[5:0]
RPC7RPC7G2RRPC7G2R[5:0]
RPD4RPD4G2RRPD4G2R[5:0]
RPD7RPD7G2RRPD7G2R[5:0]
RPE1RPE1G2RRPE1G2R[5:0]
RPE6RPE6RRPE6R[5:0]
Table 7-11. Remappable Output Pin Configuration – Group 3
RPn Port PinRPnG3R SFRRPnG3R BitsRPnG3R Value to Peripheral Pin Selection
RPA0RPA0G3RRPA0G3R[5:0]

00 0000 = Off

00 0001 = CCLO0

00 0010 = SERCOM0_PAD0

00 0011 = SERCOM0_PAD3

00 0100 = SERCOM1_PAD2

00 0101 = SERCOM1_PAD0

00 0110 = SERCOM1_PAD3

00 0111 = SERCOM2_PAD0

00 1000 = SERCOM2_PAD3

00 1001 = SERCOM3_PAD2

00 1010 = SERCOM3_PAD0

00 1011 = SERCOM3_PAD3

00 1100 = SERCOM4_PAD0

00 1101 = SERCOM4_PAD3

00 1110 = SERCOM5_PAD2

00 1111 = SERCOM5_PAD0

01 0000 = SERCOM5_PAD3

01 0001 = TCC0_WO2

01 0010 = TCC0_WO0

01 0011 = TCC0_WO4

01 0100 = TCC1_WO2

01 0101 = TCC1_WO0

01 0110 = TCC1_WO4

01 0111 = TCC2_WO0

01 1000 = TC0_WO0

01 1001 = TC1_WO0

01 1010 = TC2_WO0

01 1011 = TC3_WO0

01 1100 = TC4_WO0

01 1101 = TC5_WO0

01 1110 = TC6_WO0

01 1111 = TC7_WO0

10 0000 = TC8_WO0

10 0001 = TC9_WO1

10 0010 = QSPI_CS

10 0011 = QSPI_DATA1

10 0100 = QSPI_DATA0

10 0101 = QSPI_DATA3

10 0110 = TSTBUS1

10 0111 = TSTBUS10

10 1000 = AC_CMP0

10 1001 = AC_CMPTRDY

10 1010 = FECTRL4

10 1011 - 11 1111 = Off

RPA1RPA1G3RRPA1G3R[5:0]
RPA2RPA2G3RRPA2G3R[5:0]
RPA4RPA4G3RRPA4G3R[5:0]
RPA5RPA5G3RRPA5G3R[5:0]
RPA8RPA8G3RRPA8G3R[5:0]
RPA9RPA9G3RRPA9G3R[5:0]
RPA13RPA13G3RRPA13G3R[5:0]
RPB1RPB1G3RRPB1G3R[5:0]
RPB2RPB2G3RRPB2G3R[5:0]
RPB3RPB3G3RRPB3G3R[5:0]
RPB5RPB5G3RRPB5G3R[5:0]
RPB6RPB6G3RRPB6G3R[5:0]
RPB8RPB8G3RRPB8G3R[5:0]
RPB9RPB9G3RRPB9G3R[5:0]
RPB10RPB10G3RRPB10G3R[5:0]
RPB13RPB13G3RRPB13G3R[5:0]
RPC1RPC1G3RRPC1G3R[5:0]
RPC8RPC8G3RRPC8G3R[5:0]
RPD2RPD2G3RRPD2G3R[5:0]
RPD6RPD6G3RRPD6G3R[5:0]
RPE0RPE0G3RRPE0G3R[5:0]
RPE2RPE2G3RRPE2G3R[5:0]
Table 7-12. Remappable Output Pin Configuration – Group 4
RPn Port PinRPnG4R SFRRPnG4R BitsRPnG4R Value to Peripheral Pin Selection
RPA0RPA0G4RRPA0G4R[5:0]

00 0000 = Off

00 0001 = CCLO1

00 0010 = SERCOM0_PAD2

00 0011 = SERCOM0_PAD0

00 0100 = SERCOM1_PAD3

00 0101 = SERCOM1_PAD0

00 0110 = SERCOM2_PAD2

00 0111 = SERCOM2_PAD0

00 1000 = SERCOM3_PAD3

00 1001 = SERCOM3_PAD0

00 1010 =SERCOM4_PAD2

00 1011 = SERCOM4_PAD0

00 1100 = SERCOM5_PAD3

00 1101 = SERCOM5_PAD0

00 1110 = TCC0_WO3

00 1111 = TCC0_WO1

01 0000 = TCC0_WO5

01 0001 = TCC1_WO3

01 0010 = TCC1_WO1

01 0011 = TCC1_WO5

01 0100 = TCC2_WO1

01 0101 = TC0_WO0

01 0110 = TC1_WO1

01 0111 = TC2_WO1

01 1000 = TC3_WO1

01 1001 = TC4_WO1

01 1010 = TC5_WO1

01 1011 = TC6_WO1

01 1100 = TC7_WO1

01 1101 = TC9_WO0

01 1110 = QSPI_CS

01 1111 = QSPI_DATA2

10 0000 = QSPI_DATA1

10 0001 = QSPI_DATA0

10 0010 = TSTBUS2

10 0011 = TSTBUS6

10 0100 = AC_CMP1

10 0101 = AC_CMPTOUT

10 0110 = CAN1_TX

10 0111 = FECTRL3

10 1000 = FECTRL5

10 1001 = Off

10 1010 = Off

10 1011 - 11 1111 = Off

RPA1RPA1G4RRPA1G4R[5:0]
RPA2RPA2G4RRPA2G4R[5:0]
RPA3RPA3G4RRPA3G4R[5:0]
RPA5RPA5G4RRPA5G4R[5:0]
RPA6RPA6G4RRPA6G4R[5:0]
RPA8RPA8G4RRPA8G4R[5:0]
RPA9RPA9G4RRPA9G4R[5:0]
RPA10RPA10G4RRPA10G4R[5:0]
RPA13RPA13G4RRPA13G4R[5:0]
RPA14RPA14G4RRPA14G4R[5:0]
RPB2RPB2G4RRPB2G4R[5:0]
RPB3RPB3G4RRPB3G4R[5:0]
RPB4RPB4G4RRPB4G4R[5:0]
RPB6RPB6G4RRPB6G4R[5:0]
RPB7RPB7G4RRPB7G4R[5:0]
RPB10RPB10G4RRPB10G4R[5:0]
RPB11RPB11G4RRPB11G4R[5:0]
RPC7RPC7G4RRPC7G4R[5:0]
RPC9RPC9G4RRPC9G4R[5:0]
RPD3RPD3G4RRPD3G4R[5:0]
RPD7RPD7G4RRPD7G4R[5:0]
RPE1RPE1G4RRPE1G4R[5:0]
RPE3RPE3G4RRPE3G4R[5:0]
Table 7-13. Remappable Output Pin Configuration – Group 5
RPn Port PinRPnG5R SFRRPnG5R BitsRPnG5R Value to Peripheral Pin Selection
RPA1RPA1G5RRPA1G5R[5:0]

00 0000 = Off

00 0001 = CCLO0

00 0010 = SERCOM1_PAD3

00 0011 = SERCOM2_PAD0

00 0100 = TCC0_WO4

00 0101 = TCC0_WO2

00 0110 = TCC0_WO1

00 0111 = TCC1_WO4

00 1000 = TCC1_WO2

00 1001 = TCC1_WO1

00 1010 = TC8_WO1

00 1011 = TC9_WO1

00 1100 = QSPI_CS

00 1101 = QEICCMP0

00 1110 = GMAC_TSUCOMP

00 1111 = TSTBUS3

01 0000 = TSTBUS7

01 0001 = TSTBUS11

01 0010 = Off

01 0011 = Off

01 0100 = Off

01 0101 = Off

01 0110 = Off

01 0111 = Off

01 1000 = Off

01 1001 = Off

01 1010 = Off

01 1011 = Off

01 1100 = Off

01 1101 = Off

01 1110 = Off

01 1111 = Off

10 0000 = Off

10 0001 = Off

10 0010 = Off

10 0011 = Off

10 0100 = Off

10 0101 = Off

10 0110 = Off

10 0111 = Off

10 1000 = Off

10 1001 = Off

10 1010 = Off

10 1011 - 11 1111 = Off

RPA4RPA4G5RRPA4G5R[5:0]
RPA10RPA10G5RRPA10G5R[5:0]
RPA15RPA15G5RRPA15G5R[5:0]
RPB0RPB0G5RRPB0G5R[5:0]
RPB4RPB4G5RRPB4G5R[5:0]
RPB10RPB10G5RRPB10G5R[5:0]
RPB14RPB14G5RRPB14G5R[5:0]
RPB15RPB15G5RRPB15G5R[5:0]
RPC8RPC8G5RRPC8G5R[5:0]
RPC10RPC10G5RRPC10G5R[5:0]
RPC11RPC11G5RRPC11G5R[5:0]
RPD0RPD0G5RRPD0G5R[5:0]
RPD1RPD1G5RRPD1G5R[5:0]
RPD2RPD2G5RRPD2G5R[5:0]
RPD4RPD4G5RRPD4G5R[5:0]
RPE2RPE2G5RRPE2G5R[5:0]
RPE4RPE4G5RRPE4G5R[5:0]
Table 7-14. Remappable Output Pin Configuration – Group 6
RPn Port PinRPnG6R SFRRPnG6R BitsRPnG6R Value to Peripheral Pin Selection
RPA3RPA3G6RRPA3G6R[5:0]

00 0000 = Off

00 0001 = SERCOM0_PAD1

00 0010 = SERCOM1_PAD1

00 0011 = SERCOM2_PAD1

00 0100 = SERCOM3_PAD1

00 0101 = SERCOM4_PAD1

00 0110 = SERCOM5_PAD1

00 0111 = QSPI_SCK

00 1000 = REFO1

00 1001 = REFO2

00 1010 = REFO3

00 1011 = REFO4

00 1100 = Off

00 1101 = Off

00 1110 = Off

00 1111 = Off

01 0000 = Off

01 0001 = Off

01 0010 = Off

01 0011 = Off

01 0100 = Off

01 0101 = Off

01 0110 = Off

01 0111 = Off

01 1000 = Off

01 1001 = Off

01 1010 = Off

01 1011 = Off

01 1100 = Off

01 1101 = Off

01 1110 = Off

01 1111 = Off

10 0000 = Off

10 0001 = Off

10 0010 = Off

10 0011 = Off

10 0100 = Off

10 0101 = Off

10 0110 = Off

10 0111 = Off

10 1000 = Off

10 1001 = Off

10 1010 = Off

10 1011 - 11 1111 = Off

RPA5RPA5G6RRPA5G6R[5:0]
RPA6RPA6G6RRPA6G6R[5:0]
RPA7RPA7G6RRPA7G6R[5:0]
RPB5RPB5G6RRPB5G6R[5:0]
RPB6RPB6G6RRPB6G6R[5:0]
RPB8RPB8G6RRPB8G6R[5:0]
RPB9RPB9G6RRPB9G6R[5:0]
RPD5RPD5G6RRPD5G6R[5:0]
RPE5RPE5G6RRPE5G6R[5:0]