SmartFusion cSoC Family Product Table

Table . SmartFusion cSoC Family Product Table
SmartFusion® cSoCA2F0604A2F500
FPGA FabricSystem Gates60,000500,000
Tiles (D-flip-flops)1,53611,520
RAM Blocks (4,608 bits)824
Microcontroller Subsystem (MSS)Flash (KB)128512
SRAM (KB)1664
Cortex-M3 with memory protection unit (MPU)Yes
10/100 Ethernet MACNoYes
External Memory Controller (EMC)24-bit address,16-bit data
DMA8 Ch
I2C2
SPI2
16550 UART2
32-Bit Timer2
PLL121
32 KHz Low Power Oscillator1
100 MHz On-Chip RC Oscillator1
Main Oscillator (32 KHz to 20 MHz)1
Programmable AnalogADCs (8-/10-/12-bit SAR)133
DACs (12-bit sigma-delta)133
Signal Conditioning Blocks (SCBs)153
Comparator22103
Current Monitors2153
Temperature Monitors2153
Bipolar High Voltage Monitors22103
Note:
  1. Two PLLs are available in FG484 (one PLL in FG256).
  2. These functions share I/O pins and may not all be available at the same time. See the “Analog Front-End Overview” section in the SmartFusion Programmable Analog User’s Guide for details.
  3. Available on FG484 only.
  4. Device A2F060 is discontinued.
Table . Package I/Os: MSS + FPGA I/Os
DeviceA2F0605A2F500
PackageFG256FG256FG484
Direct Analog Inputs11812
Shared Analog Inputs141620
Total Analog Inputs152432
Total Analog Outputs123
MSS I/Os22, 32642541
FPGA I/Os6666128
Total I/Os108117204
Note:
  1. These pins are shared between direct analog inputs to the ADCs and voltage/current/temperature monitors.
  2. 16 MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for MSS. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5/1.8/2.5, 3.3V) standards.
  3. 9 MSS I/Os are primarily for 10/100 Ethernet MAC and are also multiplexed and can be used as FPGA I/Os if Ethernet MAC is not used in a design. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5V, 1.8V, 2.5V, or 3.3V) standards.
  4. 10/100 Ethernet MAC is not available on A2F060.
  5. Device A2F060 is discontinued.