6.3 NAND Flash Memory

The SAM9X60D1G-I/LZB System-On-Module embeds a 4-Gbit SLC NAND Flash memory supported through its External Bus Interface controller.

The System-On-Module implements one of the following references to provide a 4-Gbit memory space:
  • MX30LF4G28AD-XKI in VFBGA-63 package
  • MT29F4G08ABAFAH4-IT:F in VFBGA-63 package

The software must be adapted to recognize the relevant NAND Flash manufacturer. Linux supports all references. For details on how to build Linux software, refer to www.linux4microchip.com/.

The NAND_CS pin is accessible externally so that the boot can be unselected from the NAND Flash memory during debug phases.

Figure 6-1. NAND Flash Memory Block Diagram

Power Rail I/O Type Primary Alternate PIO Peripheral Reset State Note
Signal Type Signal Dir Func Signal Dir IO Set Signal, Dir, PU, PD, HiZ, ST, SEC, FILTER
VDD_3V3 GPIO PD0 I/O A NANDOE O 1 PIO, I, PU Used for NAND Flash Control Interface
VDD_3V3 GPIO PD1 I/O A NANDWE O 1 PIO, I, PU
VDD_3V3 GPIO PD2 I/O A A21/NANDALE O 1 A21,O, PD
VDD_3V3 GPIO PD3 I/O A A22/NANDCLE O 1 A22,O, PD
VDD_3V3 GPIO PD4 I/O A NCS3 O 1 PIO, I, PU
VDD_3V3 GPIO PD5 I/O A NWAIT O 1 PIO, I, PU
VDD_3V3 GPIO PD6 I/O A D16 I/O 1 PIO, I, PU Used for NAND Flash DATA Interface
VDD_3V3 GPIO PD7 I/O A D17 I/O 1 PIO, I, PU
VDD_3V3 GPIO PD8 I/O A D18 I/O 1 PIO, I, PU
VDD_3V3 GPIO PD9 I/O A D19 I/O 1 PIO, I, PU
VDD_3V3 GPIO PD10 I/O A D20 I/O 1 PIO, I, PU
VDD_3V3 GPIO PD11 I/O A D21 I/O 1 PIO, I, PU
VDD_3V3 GPIO PD12 I/O A D22 I/O 1 PIO, I, PU
VDD_3V3 GPIO PD13 I/O A D23 I/O 1 PIO, I, PU