13.2.2 Embedded Characteristics

  • Debugging with Serial Wire Debug Port (SW-DP) or JTAG Debug Port (JTAG-DP) Debug Access Port
  • Intrumentation Trace Macrocell (ITM) on Both Cores for Support of ‘printf’ Style Debugging
  • Debug Access to All Memory and Registers in the System, including Cortex-M4 Register Bank when the Core is Running, Halted, or Held in Reset
  • Flash Patch and Breakpoint (FPB) Unit for Implementing Breakpoints and Code Patches
  • Data Watchpoint and Trace (DWT) Unit for Implementing Watchpoints, Data Tracing, and System Profiling
  • IEEE 1149.1 JTAG Boundary Scan on All Digital Pins