5 USE CASE
To understand how the algorithm works, a simple case example for the dsPIC33A devices is described in this section.
After the first page of each EEPROM bank is initialized, the first location is reserved for the page status information. This indicates whether a page is active or expired, and how many erase/write cycles have been performed. This information is not directly accessible by the user but is used by the algorithm to find the available pages and update status flags. After initialization, the first page is designated as the active page.
In this example, a write operation has been performed to store a data value of 0x0202 to data EEPROM address, 0x10. As provided in Table 2, this information is stored in the first available location in the page. As more writes are performed, the algorithm continues to write the information, similarly, as provided in Table 3 through Table 5.
In this example, the data EEPROM address 0x20 is written with 0x0707, 0x10 is updated to 0x2222 and address 0x30 is written with 0x0A0A.
In Table 6, the last location in the page is written with a rewrite to address 0x20 to 0x7777. The data EEPROM information will move to the next available page because the currently active page is full. This new page is referred to as the packed page. The pack routine performs this task. Since only the most current data for each data EEPROM address is needed, the amount of information decreases.
After the data is moved, this page is designated as the current page. If the current page has incremented through all allocated pages in program memory, the erase/write count is incremented as provided in Table 7. The page is now ready to store more information through write operations.
Page Address | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
---|---|---|---|---|
Page+0 | X | Page Status<23:16> | 0x0000 | |
Page+10 | X | X | X | 0x10 |
Page+14 | 0x202 | |||
Page+20 | 0xFFFFFFFF | |||
Page+24 | 0xFFFFFFFF | |||
Page+30 | 0xFFFFFFFF | |||
Page+34 | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
Page+0x3F0 | 0xFFFFFFFF | |||
Page+0x3F4 | 0xFFFFFFFF |
Page Address | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
Page+0 | X | Page Status<23:16> | 0x0000 | |
Page+10 | X | X | X | 0x10 |
Page+14 | 0x202 | |||
Page+20 | X | X | X | 0x20 |
Page+24 | 0x707 | |||
Page+30 | 0xFFFFFFFF | |||
Page+34 | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
Page+0x3F0 | 0xFFFFFFFF | |||
Page+0x3F4 | 0xFFFFFFFF |
Page Address | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
Page+0 | X | Page Status<23:16> | 0x0000 | |
Page+10 | X | X | X | 0x10 |
Page+14 | 0x202 | |||
Page+20 | X | X | X | 0x20 |
Page+24 | 0x707 | |||
Page+30 | X | X | X | 0x10 |
Page+34 | 0x2222 | |||
. | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
Page+0x3F0 | 0xFFFFFFFF | |||
Page+0x3F4 | 0xFFFFFFFF |
Page Address | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
Page+0 | X | Page Status<23:16> | 0x0000 | |
Page+10 | X | X | X | 0x10 |
Page+14 | 0x202 | |||
Page+20 | X | X | X | 0x20 |
Page+24 | 0x707 | |||
Page+30 | X | X | X | 0x10 |
Page+34 | 0x2222 | |||
Page+40 | X | X | X | 0x30 |
Page+44 | 0x0A0A | |||
. | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
Page+0x3F0 | 0xFFFFFFFF | |||
Page+0x3F4 | 0xFFFFFFFF |
Page Address | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
Page+0 | X | Page Status<23:16> | 0x0000 | |
Page+10 | X | X | X | 0x10 |
Page+14 | 0x202 | |||
Page+20 | X | X | X | 0x20 |
Page+24 | 0x707 | |||
Page+30 | X | X | X | 0x10 |
Page+34 | 0x2222 | |||
Page+40 | X | X | X | 0x30 |
Page+44 | 0x0A0A | |||
. | . | . | . | . |
. | . | . | . | . |
Page+0x3F0 | X | X | X | 0x20 |
Page+0x3F4 | 0x7777 |
Page Address | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
Page+0 | X | Page Status<23:16> | 0x0001 | |
Page+10 | X | X | X | 0x10 |
Page+14 | 0x2222 | |||
Page+20 | X | X | X | 0x20 |
Page+24 | 0x7777 | |||
Page+30 | X | X | X | 0x30 |
Page+34 | 0x0A0A | |||
Page+40 | 0xFFFFFFFF | |||
. | 0xFFFFFFFF | |||
Page+0x3F0 | 0xFFFFFFFF | |||
Page+0x3F4 | 0xFFFFFFFF |
Only one erase/write cycle is consumed for the page as each location within the page is programmed once prior to the page erase. As a result, the algorithm multiplicatively improves the emulated data EEPROM’s effective endurance.
The previously filled page is erased only after the latest information has been programmed into the next available page and successfully verified. Through this process, the information is always stored in nonvolatile memory, which minimizes the effects of an unexpected loss of power.
As the program memory page is filled sequentially from beginning to end, the algorithm assumes the most current data EEPROM information is the closest instance to the end of the page. To simplify the read operation, the search begins at the end of the current program memory page and works toward the start of the page – looking for the specified data EEPROM address.
When a match is found, the associated data is returned for the first instance of the provided address. If the address is not found, the return value of all ones, 0xFF or 0xFFFFFFFF, is returned to emulate the result of an unwritten address in an independent data EEPROM.