4.3 PCMC Closed Loop Mode

Peak Current Mode Control is a dual loop control mode consisting of an outer voltage feedback loop and an inner inductor current feedback loop.

The outer voltage loop uses an on-chip Operational Amplifier (OPA) as differential error amplifier, comparing the output voltage feedback signal against an internal reference voltage. This reference voltage is applied by a Digital-to-Analog Converter (DAC), which is configured and set by firmware. The inverting input and output of the error amplifier are routed to device pins to insert an external RC compensation filter into the amplifier feedback loop.

The inner inductor current feedback loop is closed by routing the inductor current feedback signal on to an analog comparator CMP, which compares the current feedback signal against the output of the error amplifier. The comparator output is further routed into the PWM output generator logic COG, truncating the active on-time when the inductor current exceeds the reference signal level.

In this setup, the digital PWM module is determining the switching period and maximum duty ratio at which the active on-time will be terminated in case the COG has not been tripped by the current loop comparator CMP.

To prevent sub-harmonic oscillations in this fixed frequency, continuous conduction mode PCMC system, the PRG is put between the error amplifier OPA output and the inductor current comparator CMP reference input. This module is modulating a negative ramp onto output signal of the error amplifier OPA. The PRG modulation ramp is synchronized with the PWM to reset the negative sawtooth waveform at the end of the period. The figure below shows the peripheral configuration of the microcontroller for PCMC Closed Loop operation.

Figure 4-20. PCMC Closed Loop Configuration