45.6 Maximum Clock Frequencies

Table 45-7. Maximum GCLK Generator Output Frequencies
Symbol	Max.	Units
f_GCLKGEN0 / f_{GCLK_MAIN}	96	MHz
f_GCLKGEN1
f_GCLKGEN2
f_GCLKGEN3	66	MHz
f_GCLKGEN4
f_GCLKGEN5
f_GCLKGEN6
f_GCLKGEN7
f_GCLKGEN8

Table 45-8. Maximum CPU and Bus Clock Frequencies for Parts Running at 64 MHz ⁽¹⁾
Symbol	Description	Max.	Units
f_CPU	CPU clock frequency	64	MHz
f_AHB	AHB clock frequency	64	MHz
f_APBA	APBA clock frequency	64	MHz
f_APBB	APBB clock frequency	64	MHz
f_APBC	APBC clock frequency	64	MHz
f_APBD	APBD clock frequency	64	MHz

Note:

See the Ordering Information section to determine the parts running at 64 MHz.

Table 45-9. Maximum CPU and Bus Clock Frequencies for Parts Limited to 48 MHz ⁽¹⁾
Symbol	Description	Max.	Units
f_CPU	CPU clock frequency	48	MHz
f_AHB	AHB clock frequency	48	MHz
f_APBA	APBA clock frequency	48	MHz
f_APBB	APBB clock frequency	48	MHz
f_APBC	APBC clock frequency	48	MHz
f_APBD	APBD clock frequency	48	MHz

Note:

See the Ordering Information section to determine the parts limited to 48 MHz.

Table 45-10. Maximum Peripheral Clock Frequencies
Symbol	Description	Max.	Units
f_{GCLK_DPLL}	FDPLL96M Reference clock frequency	2	MHz
f_{GCLK_DPLL_32K}	FDPLL96M 32k Reference clock frequency	33	KHz
f_{GCLK_EIC}	EIC input clock frequency	48	MHz
f_{GCLK_FREQM_MSR}	FREQM Measure	96	MHz
f_{GCLK_FREQM_REF}	FREQM Reference	48	MHz
f_{GCLK_TSENS}	TSENS input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_0}	EVSYS channel 0 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_1}	EVSYS channel 1 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_2}	EVSYS channel 2 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_3}	EVSYS channel 3 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_4}	EVSYS channel 4 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_5}	EVSYS channel 5 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_6}	EVSYS channel 6 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_7}	EVSYS channel 7 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_8}	EVSYS channel 8 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_9}	EVSYS channel 9 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_10}	EVSYS channel 10 input clock frequency	48	MHz
f_{GCLK_EVSYS_CHANNEL_11}	EVSYS channel 11 input clock frequency	48	MHz
f_{GCLK_SERCOMx_SLOW}	Common SERCOM slow input clock frequency	5	MHz
f_{GCLK_SERCOMn_CORE}	SERCOMn input clock frequency	48	MHz
f_{GCLK_CANn}	CAN input clock frequency	48	MHz
f_{GCLK_TCC0, 1}	TCCn input clock frequency	92	MHz
f_{GCLK_TCC2}	TCC2 input clock frequency	48	MHz
f_{GCLK_TCn}	TCn input clock frequency	48	MHz
f_{GCLK_ADCn}	ADCn input clock frequency	48	MHz
f_{GCLK_SDADC}	SDADC input clock frequency	48	MHz
f_{GCLK_DAC}	DAC input clock frequency	48	MHz
f_{GCLK_PTC}	PTC input clock frequency	48	MHz
f_{GCLK_CCL}	CCL input clock frequency	48	MHz
f_{GCLK_AC}	AC digital input clock frequency	48	MHz