18.4.3.1 Debug Communication Channels

The Debug Communication Channels (DCCO and DCC1) consist of a pair of registers with associated handshake logic, accessible by both the CPU and the debugger with no security restrictions. The registers can exchange data between the CPU and the debugger during run time and in Debug mode. This enables the user to build a custom debug protocol using only these registers.

The DCC0 and DCC1 registers are accessible when the protected state is active. However, it is impossible to connect a debugger while the CPU is running (STATUSA.CRSTEXT0 is not writable, and the CPU is held in Reset) when the device is protected.

Two Debug Communication Channel status bits in the Status B register (STATUSB.DCCDn) indicate whether a new value has been written in DCC0 or DCC1. These bits, DCCD0 and DCCD1, are located in the STATUSB register. They are automatically set on write and cleared on read.