23.5.4 DMA

The TCC generates the following DMA requests:

  • Counter overflow (OVF):
    • The request is set if the Ones-shot Trigger mode in the control A register (CTRLA.DMAOS) is written to '0'. In this case, the TCC generates a DMA request on each cycle when an update condition (overflow, underflow or retrigger) is detected
    • The request is set when an update condition (overflow, underflow or retrigger) is detected while CTRLA.DMAOS=1.In this case, the TCC generates a DMA trigger on the cycle following the DMA One-Shot Command written to the Control B register (CTRLBSET.CMD=DMAOS)
    • In both cases, the request is cleared by hardware upon DMA acknowledgment
  • Channel Match (MCn):
    • The request is set on a compare match if CTRLA.DMAOS = 0
    • When CTRLA.DMAOS = 1, the DMA requests are not generated
    • The request is cleared by hardware on DMA acknowledge
  • Channel Capture (MCn):
    • The request is set when valid data is present in the CCn register, and cleared once the CCn register is read
    • In this operation mode, the CTRLA.DMAOS bit value is ignored

The DMA request lines are connected to the DMA Controller (DMAC). The DMAC must be configured before using the TCC’s DMA requests. Refer to the DMAC – Direct Memory Access Controller chapter for details.

DMA Operation with Circular Buffer

When circular buffer operation is enabled, the buffer registers must be written in the correct order and synchronized to the update times of the timer. The DMA triggers of the TCC provide a way to ensure a safe and correct update of circular buffers.
Note: Circular buffers are intended to be used only with RAMP2, RAMP2A and DSBOTH operations.
DMA Operation with Circular Buffer in RAMP2 and RAMP2A Mode

When a CCn channel is selected as a circular buffer, the related DMA request is not set on compare match detection, but on start of ramp B.

If at least one circular buffer is enabled, the DMA overflow request is triggered at the start of ramp A, with the actual DMA transfer occurring on the previous ramp B (DMA acknowledgment).

The update of all circular buffer values for ramp A can be performed through a DMA channel triggered on a MC trigger. The update of all circular buffer values for ramp B can be done through a second DMA channel triggered by the overflow DMA request.

Figure 23-37. DMA Triggers in RAMP and RAMP2 Operation Mode and Circular Buffer Enabled
DMA Operation with Circular Buffer in DSBOTH Mode

When a CC channel is selected as a circular buffer, the related DMA request is not set on compare match detection, but on the start of the down-counting phase.

If at least one circular buffer is enabled, the DMA overflow request is triggered at the start of up-counting phase with an actual DMA transfer occurring during the previous down-counting phase (DMA acknowledgment).

When up-counting, all circular buffer values can be updated through a DMA channel triggered by an MC trigger. When down-counting, all circular buffer values can be updated through a second DMA channel, triggered by the OVF DMA request.

Figure 23-38. DMA Triggers in DSBOTH Operation Mode and Circular Buffer Enabled