29.4.2.4.1 Disabling the Receiver
Writing ‘0’ to the Receiver Enable bit in the CTRLB register (CTRLB.RXEN) will disable the receiver, flush the two-level receive buffer, and cause any data from ongoing receptions to be lost.
Writing ‘0’ to the Receiver Enable bit in the CTRLB register (CTRLB.RXEN) will disable the receiver, flush the two-level receive buffer, and cause any data from ongoing receptions to be lost.
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