6.5.6.3 Boot ROM Operation During Programming and Debugging

The Boot ROM supports two modes. Refer to Figure 6-4:

1. CPU Park mode: In this mode, the core is halted in sleep mode, so it does not access any peripheral registers or memories. Therefore, the debugger can safely program the device.
2. Interactive mode: In this mode, the Boot ROM waits for commands and executes them.

The core never needs to be halted through the standard Cortex-Mx (DHCSR, DEMCR, AIRCR) registers. Park mode is used instead.

To run the Boot ROM in Interactive mode, a special cold-plug Reset sequence is used (refer to the CPU Reset Extension section). This process pauses the Boot ROM execution after the Boot ROM has initialized the device. To end the Reset extension, the debugger must clear the CRSTEXT bit in the DSU.STATUS register. The bit is cleared by writing a ‘1’ to it.

After some time (5 ms is recommended), the debugger must check if the Boot ROM has flagged any errors by reading BCC1. At this point, the debugger may exit the application by clearing the BREXT bit and sending the CMD_EXIT command. If CMD_EXIT is issued while the BREXT bit is set, the Boot ROM will enter Park mode and the response code will be set to STATUS_BOOTOK.

Alternatively, by leaving the BREXT bit set and waiting for the Boot ROM to set STATUS_INITCHECK_OK, the debugger may issue CMD_IMODE to enter the Interactive mode. Once the Boot ROM reports STATUS_OK, the device is in Interactive mode. In this mode, the Boot ROM is ready to accept other commands.